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參數資料
型號: W6691
廠商: WINBOND ELECTRONICS CORP
英文描述: ISDN S/T Interface Transceiver
中文描述: 綜合業務數字網的S / T接口收發器
文件頁數: 63/106頁
文件大小: 428K
代理商: W6691
Preliminary W6691
Publication Release Date: Sep 2001
63 Revision 1.1
B1_EXI B1_ch Extended Interrupt
This bit indicates that at least one interrupt bit has been set in B1_EXIR register.
B2_EXI B2_ch Extended Interrupt
This bit indicates that at least one interrupt bit has been set in B2_EXIR register.
8.7.6 Interrupt Mask Register
IMASK Read/Write
Address 05H
Value after reset: FFH
7
6
5
4
3
2
1
0
D_RMR
D_RME
D_XFR
INT1
INT0
D_EXI
B1_EXI
B2_EXI
Setting the bit to "1" masks the corresponding interrupt source in ISTA register. Masked interrupt status bits
are read as zero. They are internally stored and pending until the mask bits are zero.
Note:
Setting the D_EXI bit to "1" masks the interrupts in D_EXIR register.
8.7.7 D_ch Extended Interrupt Register D_EXIR
Read_clear
Address 06H
Value after reset: 00H
7
6
5
4
3
2
1
0
RDOV
XDUN
XCOL
TIN2
GCI
ICC
T1EXP
SCC
RDOV Receive Data Overflow
Frame overflow (too many short frames) or data overflow occurs in the receive FIFO. In data overflow, the
incoming data will overwrite the data in the receive FIFO. If RDOV interrupt occurs, software has to reset the
receiver and discard the data received.
相關PDF資料
PDF描述
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