
Preliminary W6691
Publication Release Date: Sep 2001
14 Revision 1.1
GCI Bus
DCL
63
I/O
GCI Bus Data Clock : the frequency is twice data rate
TE mode : 1.536 MHz.
LT-T/LT-S mode : 4.096 MHz.
NT mode : 512KHz
It needs external pull-up.
FSC
62
I/O
GCI Bus Frame Synchronization Clock: 8KHz. It needs external
pull-up.
DD
61
I/O
GCI Bus Data Downstream. It needs external pull-up.
DU
60
I/O
GCI Bus Data Upstream. It needs external pull-up.
CP/BCL
1
O
CP – output 512KHz in LT-T mode.
BCL – output 768KHz in TE mode.
FSCO
34
O
Output FSCO clock 8KHz for LT-T/LT-S mode(NT2 application). It
is synchronous to DCLO.
DCLO
33
O
Output DPLL clock 4.096MHz for LT-T/LT-S mode(NT2
application). It is synchronous to T interface clock.
C16.384
51
I
16.384 MHz clock input for DPLL circuit to generate FSCO and
DCLO.
PCM Interface( It is only used in TE Mode)
O
PCM port1 frame synchronization signal, with 8 KHz repetition rate
and 8 bits pulse width.
PFCK1
54
PFCK2
53
O
PCM port2 frame synchronization signal, with 8 KHz repetition rate
and 8 bits pulse width.
PBCK
55
O
PCM bit synchronization clock of 1.536 MHz.
PTXD
56
O
PCM transmit bus data output. A maximum of two channels with
64 Kbits/s data rate can be multiplexed on this signal. It needs
external pull-up.
PRXD
57
I
PCM bus receive data input. A maximum of two channels with 64
Kbits/s data rate can be multiplexed on this signal. It needs
external pull-up.
ISDN Signals and External Crystal
I
S/T bus receiver input (negative).
SR1
42
SR2
43
I
S/T bus receiver input (positive).
SX1
45
O
S/T bus transmitter output (positive).