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參數資料
| 型號： | W6691 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ISDN S/T Interface Transceiver |
| 中文描述： | 綜合業務數字網的S / T接口收發器 |
| 文件頁數： | 50/106頁 |
| 文件大小： | 428K |
| 代理商： | W6691 |
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Preliminary W6691
Publication Release Date: Sep 2001
50 Revision 1.1
One CI0 channel conveys the commands and indications between a layer 1 device and layer 2 device. This
C/I0 channel is accessed via register CIR (in receive direction, layer 1 to layer 2) and register CIX (in transmit
direction, layer 2 to layer 1). The C/I code is 4-bit long.
In the receive direction, the code from layer 1 is continuously monitored, with an interrupt being generated
anytime a change occurs. A new code must be found in two consecutive GCI frames to be considered
valid and to trigger a C/I code change interrupt status (double last look criterion).
In the transmit direction, the code written in CIX is continuously transmitted in the channel.
2) CI1 channel
CI1 channel is responsible for real time communication between W6691 and other non-layer1
peripheral devices. It consists of six bits. This channel can be used only in TE mode. C1X and C1R are
used for CI1 channel access in both of transmitting and receiving direction. CI1 code changed is indicated by
an interrupt without double last look criterion. This interrupt will set CI1 bit in GCI_EXIR.
7.6.2 GCI Mode Monitor Channel Handling
The Monitor channel protocol is a handshake protocol used for high speed information exchange between
the W6691 and other devices. The Monitor channel is necessary for:
Programming and controlling devices attached to the GCI interface.
Data exchange between two microprocessor systems attached to two different devices on one GCI
backplane. Use of the Monitor channel avoids the necessity of a dedicated serial communication path
between two systems.
The Monitor channel operates on an asynchronous basis. While data transfers on the bus take place
synchronized to frame sync, the flow of data is controlled by a handshake procedure using the Monitor
Channel Receiver (MOR) and Monitor Channel Transmit (MOX) bits. When data is placed into the Monitor
channel and the “A” bit is activated. This data will be transmitted repeatedly once per 8 KHz frame until the
transfer is acknowledged via the “E” bit.
The microprocessor may either enforce a 1 (idle state) in “E”, “A” bit by setting the control bit MRC or MXC
(MOCR register) to 0, or enable the control of these bits internally by the W6691 according to the Monitor
channel protocol. Thus, before a data exchange can begin, the control bit MRC, or MXC should be set to 1 by
the microprocessor.
相關PDF資料 |
PDF描述 |
|---|---|
| W6691CD | ISDN S/T Interface Transceiver |
| W6691CP | ISDN S/T Interface Transceiver |
| W6692 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6693A | USB Bus ISDN S/T Interface Controller(USB總線的ISDN S/T接口控制器) |
| W6694 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W66910 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| W66910CD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:TE Mode ISDN S/T-Controller with Microprocessor Interface |
| W6691CD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ISDN S/T Interface Transceiver |
| W6691CP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ISDN S/T Interface Transceiver |
| W6692 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:PCI Bus ISDN S/T-Controller |
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