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參數(shù)資料
| 型號(hào)： | W6690 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ISDN S/T Interface Controller(ISDN S/T接口控制器) |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)的S / T接口控制器（綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口控制器） |
| 文件頁數(shù)： | 43/76頁 |
| 文件大小： | 471K |
| 代理商： | W6690 |
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Preliminary W6690
Publication Release Date: March 1998
- 43 -
Revision A1
8.1.5 D_ch Timer Register
D_TIMR
Read/Write
Address 04H
Value after reset: FFH
7
6
5
4
3
2
1
0
CNT2
CNT1
CNT0
VAL4
VAL3
VAL2
VAL1
VAL0
CNT together with VAL determine the time period T2 after which a TEXP interrupt will be generated:
T2 = CNT * 2.048 s + T1 with T1 = (VAL +1) * 0.064 s
The timer is started by setting the STT bit in D_CMDR and will be stopped when a TEXP interrupt is
generated or the D_TIMR register is written.
Note: If CNT is set to 7, a TEXP interrupt is generated periodically at every expiration of T1.
This register can be read only after the timer has been started. The read value indicates the timer's
current count value. In case layer 1 is not activated, a C/I command "ECK" must be issued in addition
to the STT command to start the timer.
8.1.6 Interrupt Status RegisterISTA
Read-clear
Address 05H
Value after reset: 00H
7
6
5
4
3
2
1
0
D_RMR
D_RME
D_XFR
D_EXI
B1_EXI
B2_EXI
D_RMR D_ch Receive Message Ready
A 32-byte data is available in the D_RFIFO. The frame is not complete yet.
D_RME D_ch Receive Message End
The last part of a frame with length > 32 bytes or a whole frame with length
≤
32 bytes has been
received. The whole frame length is obtained from D_RBCH + D_RBCL registers. The length of data
in the D_RFIFO equals:
data length = RBC4-0 if RBC4-0
≠
0
data length = 32 if RBC4-0 = 0
D_XFR D_ch Transmit FIFO Ready
This bit indicates that the transmit FIFO is ready to accept data. Up to 32 bytes of data can be written
into the D_XFIFO.
An D_XFR interrupt is generated in the following cases:
after an XMS command, when
≥
32 bytes of XFIFO is empty
after an XMS together with an XME command is issued, when the whole frame has been
transmitted
after an XRST command
after hardware reset
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