
Preliminary W6690
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7.2.4 D Channel Access Control
The D channel access control includes collision detection and priority management. The collision
detection is always enabled. The priority management procedure as specified in ITU-T I.430 is fully
implemented in W6690.
A collision is detected if the transmitted D bit and the received echo bit do not match. When this
occurs, D channel transmission is immediately stopped and the echo channel is monitored to attempt
the next D channel access. The layer 1 module uses an internal signal to inform layer 2 module of the
collision condition (DRDY bit goes inactive in CIR register).
There are two priority classes : class 1 and class 2. Within each class, there are normal and lower
priority levels.
Table 7.4 D priority classes
NORMAL LEVEL
LOWER LEVEL
Priority Class 1
8
9
Priority Class 2
10
11
The selection of priority class is via the AR8/AR10 command. The following table summarizes the
commands/indications used for setting the priority classes :
Table 7.5 D Priority commands/indications
COMMAND
SYM.
CODE
REMARKS
Activate request, set priority 8
AR8
1000 Activation command, set D channel priority to 8
Activate request, set priority 10
AR10
1001 Activation command, set D channel priority to 10
INDICATION
ABBR.
REMARKS
Activate indication with priority 8
AI8
1100 Info 4 received, D channel priority is 8 or 9
Activate indication with priority 10
AI10
1101 Info 4 received, D channel priority is 10 or 11
7.2.5 Frame Alignment
The following sections describe the behavior of W6690 in respect to the CTS-2 conformance test
procedures for frame alignment. Please refer to ETSI-TM3 Appendix B1 for detailed descriptions.
7.2.5.1 FAinfA_1fr
This test checks if TE does not lose frame alignment on receipt of one bad frame. The pattern for the
bad frame is defined as IX_96 KHz. This pattern consists of alternating pulses at 96 KHz during the
whole frame.