
Preliminary W77C32
Publication Release Date: March 1999
- 51 - Revision A1
1/4
1/12
T2M = CKCON.5
1
C/T2 = T2CON.1
0
T2CON.7
T2 = P1.0
T2CON.6
TR2 =
T2CON.2
T2EX = P1.1
EXEN2 = T2CON.3
EXF2
Timer 2
Interrupt
TF2
TH2
TL2
RCAP2H
RCAP2L
L
0
1
Clock Source
Mode input
div. by 4 osc/1
div. by 64 osc/16
div. by 1024 osc/256
Figure 15. 16-Bit Auto-reload Mode, Counting Up
Auto-reload Mode, Counting Up/Down
Timer/Counter 2 will be in auto-reload mode as an up/down counter if CP/
RL2
bit in T2CON is
cleared and the DCEN bit in T2MOD is set. In this mode, Timer/Counter 2 is an up/down counter
whose direction is controlled by the T2EX pin. A 1 on this pin cause the counter to count up. An
overflow while counting up will cause the counter to be reloaded with the contents of the capture
registers. The next down count following the case where the contents of Timer/Counter equal the
capture registers will load an FFFFh into Timer/Counter 2. In either event a reload will set the TF2 bit.
A reload will also toggle the EXF2 bit. However, the EXF2 bit can not generate an interrupt while in
this mode.
C/T = T2CON.1
1/4
1/12
T2M = CKCON.5
Down Counting Reload Value
0FFh
T2CON
. 7
Up Counting Reload
Value
T2 = P1.0
T2CON.6
TR2 = T2CON.2
T2EX = P1.1
EXF2
Timer 2
Interrupt
TF2
TH2
TL2
RCAP2H
RCAP2L
1
0
0
1
0FFh
DCEN = 1
Clock Source
Mode input
div. by 4 osc/1
div. by 64 osc/16
div. by 1024 osc/256
Figure 16. 16-Bit Auto-reload Up/Down Counter