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參數資料
| 型號： | W3100A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | i2Chip W3100A |
| 中文描述： | i2Chip W3100A |
| 文件頁數： | 41/63頁 |
| 文件大小： | 557K |
| 代理商： | W3100A |
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pin, and the MCU bus I/F is activated by the External clock.
In Non-clocked mode, the internal functions of W3100A are executed by the clock granted to the clock pin,
and the MCU bus I/F is activated by /CS, /RD, /WR of MCU. As shown in the timing diagram, and unlike
Clocked mode and External clocked mode, a timing condition exists between /CS, /RD, and /WR.
I
2
C I/F mode is used when an MCU connected to W3100A supports I
2
C I/F but does not support bus I/F.
The basic frequency to be used for I
2
C is activated by the clock granted to the clock pin and both 100KHz
mode and 400KHz mode are supported.
2. Direct Bus I/F Mode.
As illustrated in the above diagram, Direct Bus I/F mode uses a 15-bit address line and 8-bit data line, /CS,
/RD, /WR, /INT, which is identical to the I/F of the existing W3100A.
Since the access timing changes from Clocked mode (page 50) to External clocked mode (page 52) and to
Non-clocked mode (page 54), the MCU bus access timing needs to be considered.
3. Indirect Bus I/F Mode.
Indirect Bus I/F mode uses a 2-bit address line and 8-bit data line, /CS, /RD, /WR, and /INT.
Of the address lines, A[14:4] is grounded as ‘0’ and A[3:2] is pulled up (4.7
k
)
to ‘1’.
/INT
A[14:0]
MCU
/WR
D[7:0]
/RD
/INT
D[7:0]
A[14:0]
/CS
/WR
RXC
CRS
RXD[3:0]
TXC
MII
/LINK
/RD
Ethernet
PHY
TXE
TXD[3:0]
COL
/LINK
/FDPLX
CLOCK
RX_CLK
RXDV/CRS
RXD[3:0]
TX_CLK
TXD[3:0]
COL
TXE
Trans-
former
TX
±
RX
±
RJ-45
/CS
/FDPLX
CLOCK
/INT
A[1:0]
MCU
/WR
D[7:0]
/RD
/INT
D[7:0]
A[1:0]
/CS
/WR
RXC
CRS
RXD[3:0]
TXC
MII
/LINK
/RD
Ethernet
PHY
TXE
TXD[3:0]
COL
/LINK
/FDPLX
CLOCK
RX_CLK
RXDV/CRS
RXD[3:0]
TX_CLK
TXD[3:0]
COL
TXE
Trans-
former
TX
±
RX
±
RJ-45
/CS
/FDPLX
CLOCK
A[3:2]
A[14:4]
VCC
4.7
k
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