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參數(shù)資料
型號: W77LE532
廠商: WINBOND ELECTRONICS CORP
元件分類: 8位微控制器
英文描述: 8 BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁數(shù): 60/85頁
文件大小: 2458K
代理商: W77LE532
Preliminary W77LE532
- 60 -
PCON SFR. Transmission begins with a write to SBUF. The serial data is brought out on to TxD pin at
C1 following the first roll-over of the divide by 16 counter. The next bit is placed on TxD pin at C1
following the next rollover of the divide by 16 counter. Thus the transmission is synchronized to the
divide by 16 counter, and not directly to the write to SBUF signal. After all 9 bits of data are
transmitted, the stop bit is transmitted. The TI flag is set in the C1 state after the stop bit has been put
out on TxD pin. This will be at the 11th rollover of the divide by 16 counter after a write to SBUF.
Reception is enabled only if REN is high. The serial port actually starts the receiving of serial data,
with the detection of a falling edge on the RxD pin. The 1-to-0 detector continuously monitors the RxD
line, sampling it at the rate of 16 times the selected baud rate. When a falling edge is detected, the
divide by 16 counter is immediately reset. This helps to align the bit boundaries with the rollovers of
the divide by 16 counter. The 16 states of the counter effectively divide the bit time into 16 slices. The
bit detection is done on a best of three basis. The bit detector samples the RxD pin, at the 8th, 9th and
10th counter states. By using a majority 2 of 3 voting system, the bit value is selected. This is done to
improve the noise rejection feature of the serial port.
SBUF
RB8
Transmit Shift Register
Receive Shift Register
TX
SHIFT
PAROUT
D8
Internal
Data Bus
Internal
Data
Bus
TXD
RXD
Serial Port
Interrupt
SMOD=
(SMOD_1)
SAMPLE
Write to
SBUF
TX
START
TX
CLOCK
SOUT
0
1
TI
PARIN
STOP
START
LOAD
CLOCK
Read
SBUF
RI
SERIAL
CONTROLLER
RX CLOCK
LOAD
SBUF
RX START
RX SHIFT
2
16
1-TO-0
DETECTOR
BIT
DETECTOR
16
CLOCK
SIN
D8
TB8
Clock Source
Mode input
div. by 4 osc/2
div. by 64 osc/32
div. by 1024 osc/512
Figure 22. Serial Port Mode 2
If the first bit detected after the falling edge of RxD pin, is not 0, then this indicates an invalid start bit,
and the reception is immediately aborted. The serial port again looks for a falling edge in the RxD line.
If a valid start bit is detected, then the rest of the bits are also detected and shifted into the SBUF.
After shifting in 9 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded
and RI is set. However certain conditions must be met before the loading and setting of RI can be
done.
1. RI must be 0 and
2. Either SM2 = 0, or the received stop bit = 1.
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