
Preliminary W77E516
- 66 -
stop bit is transmitted. The TI flag is set in the C1 state after the stop bit has been put out on TxD
pin. This will be at the 10th rollover of the divide by 16 counter after a write to SBUF.
Reception is enabled only if REN is high. The serial port actually starts the receiving of serial data,
with the detection of a falling edge on the RxD pin. The 1-to-0 detector continuously monitors the
RxD line, sampling it at the rate of 16 times the selected baud rate. When a falling edge is detected,
the divide by 16 counter is immediately reset. This helps to align the bit boundaries with the
rollovers of the divide by 16 counter.
The 16 states of the counter effectively divide the bit time into 16 slices. The bit detection is done on
a best of three basis. The bit detector samples the RxD pin, at the 8th, 9th and 10th counter states.
By using a majority 2 of 3 voting system, the bit value is selected. This is done to improve the noise
rejection feature of the serial port. If the first bit detected after the falling edge of RxD pin is not 0,
then this indicates an invalid start bit, and the reception is immediately aborted. The serial port
again looks for a falling edge in the RxD line. If a valid start bit is detected, then the rest of the bits
are also detected and shifted into the SBUF.
After shifting in 8 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded
and RI is set. However certain conditions must be met before the loading and setting of RI can be
done.
1. RI must be 0 and
2. Either SM2 = 0, or the received stop bit = 1.
If these conditions are met, then the stop bit goes to RB8, the 8 data bits go into SBUF and RI is
set. Otherwise the received frame may be lost. After the middle of the stop bit, the receiver goes
back to looking for a 1-to-0 transition on the RxD pin.
SBUF
RB8
Transmit Shift Register
Receive Shift
Register
TX SHIFT
PAROUT
D8
Internal
Data Bus
Internal
Data
Bus
TXD
RXD
Serial Port
Interrupt
SMOD=
(SMOD_1)
TCLK
RCLK
SAMPLE
Write to
SBUF
TX START
SOUT
0
1
0
1
TI
1
0
PARIN
STOP
START
LOAD
CLOCK
Read
SBUF
Timer 2 Overflow
(for Serial Port 0 only)
Timer 1
Overflow
TX CLOCK
RI
SERIAL
CONTROLLER
RX CLOCK
LOAD
SBUF
RX
START
RX SHIFT
÷
2
÷
λ _; Φ
16
1-TO-0
DETECTOR
BIT
DETECTOR
÷
Γ ~
16
CLOCK
SIN
Figure 21: Serial Port Mode 1