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參數資料
型號: W77E516F-25
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數: 57/85頁
文件大小: 596K
代理商: W77E516F-25
Preliminary W77E516
Publication Release Date: August 16, 2002
- 57 -
Revision A1
Time-base Selection
The W77E516 gives the user two modes of operation for the timer. The timers can be programmed to
operate like the standard 8051 family, counting at the rate of 1/12 of the clock speed. This will ensure
that timing loops on the W77E516 and the standard 8051 can be matched. This is the default mode of
operation of the W77E516 timers. The user also has the option to count in the turbo mode, where the
timers will increment at the rate of 1/4 clock speed. This will straight-away increase the counting speed
three times. This selection is done by the T0M and T1M bits in CKCON SFR. A reset sets these bits to
0, and the timers then operate in the standard 8051 mode. The user should set these bits to 1 if the
timers are to operate in turbo mode.
Mode 0
In Mode 0, the timer/counters act as a 8 bit counter with a 5 bit, divide by 32 pre-scale. In this mode
we have a 13 bit timer/counter. The 13 bit counter consists of 8 bits of THx and 5 lower bits of TLx.
The upper 3 bits of TLx are ignored.
The negative edge of the clock increments the count in the TLx register. When the fifth bit in TLx
moves from 1 to 0, then the count in the THx register is incremented. When the count in THx
moves from FFh to 00h, then the overflow flag TFx in TCON SFR is set. The counted input is
enabled only if TRx is set and either GATE = 0 or INTx = 1. When C/T is set to 0, then it will
count clock cycles, and if C/T is set to 1, then it will count 1 to 0 transitions on T0 (P3.4) for timer
0 and T1 (P3.5) for timer 1. When the 13 bit count reaches 1FFFh the next count will cause it to
roll-over to 0000h. The timer overflow flag TFx of the relevant timer is set and if enabled an
interrupts will occur. Note that when used as a timer, the time-base may be either clock cycles/12 or
clock cycles/4 as selected by the bits TxM of the CKCON SFR.
1/4
1/12
C/T = TMOD.2
(C/T = TMOD.6)
T0M = CKCON.3
(T1M = CKCON.4)
M1,M0 = TMOD.1,TMOD.0
(M1,M0 = TMOD.5,TMOD.4)
Interrupt
T0 = P3.4
(T1 = P3.5)
TH0
(TH1)
TL0
(TL1)
TF0
(TF1)
TR0 = TCON.4
(TR1 = TCON.6)
GATE = TMOD.3
(GATE = TMOD.7)
INT0 = P3.2
(INT1 = P3.3)
7
0
TFx
4
7
0
Timer 1 functions are shown in brackets
1
00
0
0
1
01
Clock Source
Mode input
div. by 4 osc/1
div. by 64 osc/16
div. by 1024 osc/256
Figure 11: Timer/Counter Mode 0 & Mode 1
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