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參數資料
型號: W741C20X
廠商: WINBOND ELECTRONICS CORP
英文描述: 4-BIT MICROCONTROLLER
中文描述: 4位微控制器
文件頁數: 11/84頁
文件大小: 486K
代理商: W741C20X
Preliminary W741C20X
Publication Release Date: March 1998
- 11 -
Revision A3
Timer/Counter
Timer 0 (TM0)
Timer 0 (TM0) is a programmable 8-bit binary down-counter. The specified value can be loaded into
TM0 by executing the MOV TM0L (TM0H), R or MOV TM0, #I instruction. When the MOV TM0L
(TM0H), R instructions are executed, the TM0 will stop down-counting (if the TM0 is down-counting),
the MR0.3 will be reset to 0, and the specified value is loaded into TM0. If MR0.3 is set to 1, the
event flag 1 (EVF.1) is reset and the TM0 starts to count. When it decrements to FFH, Timer 0 stops
operating and generates an underflow (EVF.1 = 1). The interrupt is executed if the Timer 0 interrupt
enable flag has been set (IEF.1 = 1); and the hold state is terminated if the hold release enable flag 1
has been set (HEF.1 = 1). The Timer 0 clock input can be set as F
OSC
/1024 or F
OSC
/4 by setting
MR0.0 to 1 or by resetting MR0.0 to 0. The default timer value is F
OSC
/4. The organization of Timer 0
is shown in Figure 5.
If the Timer 0 clock input is F
OSC
/4, then:
Desired time 0 interval = (preset value +1)
×
4
×
1/F
OSC
If the Timer 0 clock input is F
OSC
/1024, then:
Desired time 0 interval = (preset value +1)
×
1024
×
1/F
OSC
Preset value: Decimal number of Timer 0 preset value
F
OSC
: Clock oscillation frequency
Fosc/4
Fosc/1024
Enable
Disable
1. Reset
2. CLR EVF, #02H
3. Reset MR0.3 to 0
4. MOV TM0L, R or MOV TM0H, R
8-bit Binary
Down Counter
(Timer 0)
S
R
Q
HEF.1
IEF.1
Hold mode release (HCF.1)
Timer 0 interrupt (INT1)
1. Reset
2. CLR EVF, #02H
3. Set MR0.3 to 1
4. MOV TM0, #I
EVF.1
MR0.0
1. Set MR0.3 to 1
2. MOV TM0, #I
4
4
MOV TM0H, R
MOV TM0L, R
8
MOV TM0, #I
Figure 5. Organization of Timer 0
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