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參數(shù)資料
| 型號： | W6662CF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | CCD(Correlated Double Sampler)/CIS(Contact Image Sensors) Analog Front End Signal Processor.(耦合采樣器／接觸圖象傳感器模擬前端信號處理器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 10 X 10 MM, 2 MM HEIGHT, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 8/19頁 |
| 文件大小： | 272K |
| 代理商： | W6662CF |
Preliminary W6662CF
- 8 -
R/W A0 A1 A2 -- -- -- -- D0 D1 D2 D3 D4 D5 D6 D7
Address phase
Data phase
R/W is read (high) or write (low) command to access the register.
A0, A1 and A2 is the address select bits of the register.
D0 throuth D7 is the data bit of the register, D7 is MSB and D0 is LSB.
The address of the registers is:
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
REGISTER
Configuration Register
Red PGA Register
Green PGA Register
Blue PGA Register
Red Offset Register
Green Offset Register
Blue Offset Register
Reserved
Configuration Register
The bit definition of configuration register is:
A. Configuration mode (wake up and configuration)
bit 0 = 0: 1.5V input span.
1: 3.0V input span.
bit 1 = 0: S&H mode.
1: CDS mode.
bit [3:2] = 0 0: Red channel input only.
0 1: Green channel input only.
1 0: Blue channel input only.
1 1: Three channels input and selected by SEL1 and SEL0 signals.
bit 4 = Reserved (must set to 0).
bit 5 = 0: PAOUT and PAOUTN enable.
1: PAOUT and PAOUTN disable.
bit 6 = Reserved (must set to 0).
bit 7 = 0.
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