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參數資料
| 型號： | W6612 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 編解碼器 |
| 英文描述： | Dual PCM Codec(雙通道PCM編解碼器) |
| 中文描述： | A/MU-LAW, PCM CODEC, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數： | 7/21頁 |
| 文件大小： | 161K |
| 代理商： | W6612 |
W6612
Publication Release Date: October 1998
- 7 -
Revision A1
5. BLOCK DIAGRAM
-1
+
+
+
-
Smoothing
LPF
SD ADC
SD DAC
-1
+
-
+
+
-
Smoothing
LPF
SD ADC
SD DAC
2.5 V
ref. Voltage
2.7 V
Regulator
Power Supply
Management
System
Dual SD Codec-Filter
A/Mu Law
Expander
A/Mu Law
Compressor
Serial
Data
Port
(SDP)
A/Mu Law
Expander
A/Mu Law
Compressor
Serial
Data
Port
(SDP)
MODE0
MODE1
Sequence
and Control
PO1+
PO1-
PI1
RO1
T1+
T1-
TG1
PO2+
PO2-
PI2
RO2
T2+
T2-
TG2
VAG
VDSP
MCLK
FSR1
BCLKR1
DR1
FST1
BCLKT1
DT1
FSR2
BCLKR2
DR2
FST2
BCLKT2
DT2
Data
Conversion
PDI1
PDI2
Figure 5. Winbond Dual PCM
Σ
Codec Block Diagram
6. FUNCTIONAL DESCRIPTIONS
Figure 5 illustrates the functional blocks of the Winbond Dual PCM
Σ
codec.
6.1. Power Supply Management System
6.1.1. Power Supply for All Analog Signals Processing
All analog circuits are supplied with VAA1 and VAA2, two 5
±
5% volt power supply. VAA1 power
provides the first
Σ
codec-filter and OP amplifier; the VAA2 power provides the second
Σ
codec-
filter and OP. amplifier.
6.1.2. Power Supply for All Digital Signals Processing
All digital circuits are supplied by the V
DSP
pin from a 2.7-volt regulator circuit. This reduces the chip
power consumption. Note that the V
DSP
pin should be decoupled to GNDA with a 0.1
μ
F capacitor
and that this pin cannot be used for powering external loads.
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