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參數資料
型號: W39V080FA
廠商: WINBOND ELECTRONICS CORP
英文描述: 1M 】 8 CMOS FLASH MEMORY WITH FWH INTERFACE
中文描述: 100萬】8的CMOS固件樞紐接口閃存
文件頁數: 7/35頁
文件大小: 301K
代理商: W39V080FA
W39V080FA
Publication Release Date: Dec. 13, 2005
- 7 -
Revision A5
6.10 Write Operation Status
The device provides several bits to determine the status of a program or erase operation: DQ5, DQ6,
and DQ7. Each of DQ7 and DQ6 provides a method for determining whether a program or erase
operation is complete or in progress. The device also offers a hardware-based output signal, RY/#BY in
programmer mode, to determine whether an Embedded Program or Erase operation is in progress or
has been completed.
6.10.1 DQ7: #Data Polling
The #Data Polling bit, DQ7, indicates whether an Embedded Program or Erase algorithm is in progress
or completed. Data Polling is valid after the rising edge of the final #WE pulse in the command
sequence.
During the Embedded Program algorithm, the device outputs on DQ7 and the complement of the data
programmed to DQ7. Once the Embedded Program algorithm has completed, the device outputs the
data programmed to DQ7. The system must provide the program address to read valid status
information on DQ7. If a program address falls within a protected sector, #Data Polling on DQ7 is active
for about 1
μ
S, and then the device returns to the read mode.
During the Embedded Erase algorithm, #Data Polling produces “0” on DQ7. Once the Embedded
Erase algorithm has completed, #Data Polling produces “1” on DQ7. An address within any of the
sectors selected for erasure must be provided to read valid status information on DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected, #Data
Polling on DQ7 is active for about 100
μ
S, and then the device returns to the read mode. If not all
selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and
ignores the selected sectors that are protected. However, if the system reads DQ7 at an address within
a protected sector, the status may not be valid.
Just before the completion of an Embedded Program or Erase operation, DQ7 may change
asynchronously with DQ0-DQ6 while Output Enable (#OE) is set to low. That is, the device may
change from providing status information to valid data on DQ7. Depending on when it samples the DQ7
output, the system may read the status or valid data. Even if the device has completed the program or
erase operation and DQ7 has valid data, the data outputs on DQ0-DQ6 may be still invalid. Valid data
on DQ7-DQ0 will appear on successive read cycles.
6.10.2 RY/#BY: Ready/#Busy
The
RY/#BY
is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in
progress or complete. The
RY/#BY
status is valid after the rising edge of the final
#WE
pulse in the command
sequence. Since
RY/#BY
is an open-drain output, several
RY/#BY
pins can be tied together in parallel with a
pull-up resistor to V
DD
.
When the output is low (Busy), the device is actively erasing or programming. When the output is high
(Ready), the device is in the read mode or standby mode.
6.10.3 DQ6: Toggle Bit
Toggle Bit on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete. Toggle Bit I may be read at any address, and is valid after the rising edge of the final #WE
pulse in the command sequence (before the program or erase operation), and during the sector erase
time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address
cause DQ6 to toggle. The system may use either #OE to control the read cycles. Once the operation
has completed, DQ6 stops toggling.
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W39V080FAP 1M 】 8 CMOS FLASH MEMORY WITH FWH INTERFACE
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W39V080FAP 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M 】 8 CMOS FLASH MEMORY WITH FWH INTERFACE
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