
Preliminary W77E468
Publication Release Date: January 1999
- 21 - Revision A1
SLAVE ADDRESS 1
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADDR1
Address: AAh
SADDR1: The SADDR1 should be programmed to the given or broadcast address for serial port 1 to
which the slave processor is designated.
PORT 3
Bit:
7
6
5
4
3
2
1
0
-
-
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
Mnemonic: P3
Address: B0h
P3.5-0: General purpose I/O port. Each pin also has an alternate input or output function. The
alternate
functions are described below.
P3.5
T1
Timer/counter 1 external count input
P3.4
T0
Timer/counter 0 external count input
P3.3
INT1
External interrupt 1
P3.2
INT0
External interrupt 0
P3.1
P3.0
TxD
RxD
Serial port 0 output
Serial port 0 input
INTERRUPT PRIORITY
Bit:
7
6
5
4
3
2
1
0
-
PS1
PT2
PS
PT1
PX1
PT0
PX0
Mnemonic: IP
Address: B8h
IP.7:
PS1:
PT2:
PS:
PT1:
PX1:
PT0:
PX0:
This bit is un-implemented and will read high.
This bit defines the Serial port 1 interrupt priority. PS = 1 sets it to higher priority level.
This bit defines the Timer 2 interrupt priority. PT2 = 1 sets it to higher priority level.
This bit defines the Serial port 0 interrupt priority. PS = 1 sets it to higher priority level.
This bit defines the Timer 1 interrupt priority. PT1 = 1 sets it to higher priority level.
This bit defines the External interrupt 1 priority. PX1 = 1 sets it to higher priority level.
This bit defines the Timer 0 interrupt priority. PT0 = 1 sets it to higher priority level.
This bit defines the External interrupt 0 priority. PX0 = 1 sets it to higher priority level.