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參數(shù)資料
型號: W3H32M72E-SBC
英文描述: 32M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package
中文描述: 32M × 72配置DDR2 SDRAM的208 PBGA封裝多芯片封裝
文件頁數(shù): 16/30頁
文件大?。?/td> 934K
代理商: W3H32M72E-SBC
W3H32M72E-XSBX
16
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
February 2006
Rev. 2
PRELIMINARY*
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
EXTENDED MODE REGISTER 2
The extended mode register 2 (EMR2) controls functions
beyond those controlled by the mode register. Currently
all bits in EMR2 are reserved, as shown in Figure 8. The
EMR2 is programmed via the LM command and will
retain the stored information until it is programmed again
or the device loses power. Reprogramming the EMR will
not alter the contents of the memory array, provided it is
performed correctly.
EMR2 must be loaded when all banks are idle and no
bursts are in progress, and the controller must wait the
specified time
t
MRD before initiating any subsequent
operation. Violating either of these requirements could
result in unspecified operation.
EXTENDED MODE REGISTER 3
The extended mode register 3 (EMR3) controls functions
beyond those controlled by the mode register. Currently,
all bits in EMR3 are reserved, as shown in Figure 9.
The EMR3 is programmed via the LM command and will
retain the stored information until it is programmed again
or the device loses power. Reprogramming the EMR will
not alter the contents of the memory array, provided it is
performed correctly.
EMR3 must be loaded when all banks are idle and no
bursts are in progress, and the controller must wait the
specified time
t
MRD before initiating any subsequent
operation. Violating either of these requirements could
result in unspecified operation.
COMMAND TRUTH TABLES
The following tables provide a quick reference of DDR2
SDRAM available commands, including CKE power-down
modes, and bank-to-bank commands.
FIGURE 9 – EXTENDED MODE REGISTER 3 (EMR3) DEFINITION
A9
A7 A6 A5 A4 A3
A8
A2
A1 A0
Extended Mode
Register (Ex)
Address Bus
9
7
6
5
4
3
8
2
1
0
A10
A12 A11
BA0
BA1
10
0
1
11
0
1
12
0
1
13
0
1
14
15
EMR3
A13
0
1
0
1
Mode Register Definition
Mode Register (MR)
Extended Mode Register (EMR)
Extended Mode Register (EMR2)
Extended Mode Register (EMR3)
M15
0
0
1
1
M14
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Note: 1. E13 (A13)-E0 (A0) are reserved for future use and must be programmed to
"0." A13 is not used in this device.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W3H32M72E-SBI 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package
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