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參數資料
| 型號： | W29D040C |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 512K×8bit CMOS Flash Memory(512K×8位CMOS閃速存儲器) |
| 中文描述： | 為512k × 8位的CMOS閃存（為512k × 8位的CMOS閃速存儲器） |
| 文件頁數： | 4/40頁 |
| 文件大小： | 280K |
| 代理商： | W29D040C |
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W29D040C
- 4 -
FUNCTIONAL DESCRIPTION
DEVICE BUS OPERATION
Read Mode
The read operation of the W29D040C is controlled by CE and OE, both of which have to be low for the
host to obtain data from the outputs. CE is used for device selection. When CE is high, the chip is de-
selected and only standby power will be consumed. OE is the output control and is used to gate data
from the output pins. The data bus is in high impedance state when either CE or OE is high. Refer to
the timing waveforms for further details.
Write Mode
Device erasure and programming are accomplished via the command register. The contents of the
register serve as inputs to the internal state machine. The state machine outputs dictate the function of
the device.
The command register itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information needed to execute the
command. The command register is written to bringing
WE
to logic low state, while CE is at logic low
state and OE is at logic high state. Addresses are latched on the falling edge of
WE
or CE, whichever
happens later; while data is latched on the rising edge of
WE
or CE, whichever happens first. Standard
microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing
parameters.
Standby Mode
There are two ways to implement the standby mode on the W29D040C device, both using the CE pin.
A CMOS standby mode is achieved with the CE input held at VCC
±
0.3V. Under this condition the
current is typically reduced to less than 5
μ
A. A TTL standby mode is achieved with the CE pin held at
VIH. Under this condition the current is typically reduced to 1 mA.
In the standby mode the outputs are in the high impedance state, independent of the OE input.
Output Disable Mode
With the OE input at a logic high level (VIH), output from the device is disabled. This will cause the
output pins to be in a high impedance state.
Autoselect Mode
The autoselect mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended for use by programming equipment for the purpose of
automatically matching the device to be programmed with its corresponding programming algorithm. This
mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force VID (11.5V to 12.5V) on address pin A9.
Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from VIL to
VIH. All addresses are don
′
t cares except A0, A1, and A6 (see "Autoselet Codes").
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