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參數資料
| 型號： | W77E516P-25 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數： | 27/85頁 |
| 文件大?。?/td> | 596K |
| 代理商： | W77E516P-25 |
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Preliminary W77E516
Publication Release Date: August 16, 2002
- 27 -
Revision A1
Status Register
Bit:
7
-
6
5
4
3
2
1
0
HIP
LIP
XTUP
SPTA1
SPRA1
SPTA0
SPRA0
Mnemonic: STATUS
Address: C5h
HIP: High Priority Interrupt Status. When set, it indicates that software is servicing a high priority
interrupt. This bit will be cleared when the program executes the corresponding RETI
instruction.
LIP: Low Priority Interrupt Status. When set, it indicates that software is servicing a low priority
interrupt. This bit will be cleared when the program executes the corresponding RETI
instruction.
XTUP: Crystal Oscillator Warm-up Status. When set, this bit indicates CPU has detected clock to
be ready. Each time the crystal oscillator is restarted by exit from power down mode,
hardware will clear this bit. This bit is set to 1 after a power-on reset.
SPTA1: Serial Port 1 Transmit Activity. This bit is set during serial port 1 is currently transmitting
data. It is cleared when TI_1 bit is set by hardware. Changing the Clock Divide Control bits
CD0, CD1 will be ignored when this bit is set to 1 and SWB = 1.
SPRA1: Serial Port 1 Receive Activity. This bit is set during serial port 1 is currently receiving a
data. It is cleared when RI_1 bit is set by hardware. Changing the Clock Divide Control bits
CD0, CD1 will be ignored when this bit is set to 1 and SWB = 1.
SPTA0: Serial Port 0 Transmit Activity. This bit is set during serial port 0 is currently transmitting
data. It is cleared when TI bit is set by hardware. Changing the Clock Divide Control bits
CD0, CD1 will be ignored when this bit is set to 1 and SWB = 1.
SPRA0: Serial Port 0 Receive Activity. This bit is set during serial port 0 is currently receiving a
data. It is cleared when RI bit is set by hardware. Changing the Clock Divide Control bits
CD0, CD1 will be ignored when this bit is set to 1 and SWB = 1.
NVM Address Select
Bit:
7
-
6
-
5
4
3
2
1
0
DCID5
DCID4
DCID3
DCID2
DCID1
DCID0
Mnemonic: NVMSEL
Address: C6h
DCID[5:0]: 6-bit address to access individual location of on-chip 64 bytes non-volatile data memory.
For instance, asserting DCID[5:0] = 00000b addresses to the NVM 1
st
byte, DCID[5:0] =
11111b addresses to the NVM 64
th
byte.
NVM ADDRESS
0
1
2
3
4
5
6
7
…
63
DCID5
0
0
0
0
0
0
0
0
…
1
DCID4
0
0
0
0
0
0
0
0
…
1
DCID3
0
0
0
0
0
0
0
0
…
1
DCID2
0
0
0
0
1
1
1
1
…
1
DCID1
0
0
1
1
0
0
1
1
…
1
DCID0
0
1
0
1
0
1
0
1
…
1
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| W77E532A40DL | 功能描述:IC MCU 8-BIT 128KB FLASH 40-DIP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:W77 產品培訓模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標準包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設備:DMA，POR，PWM，WDT 輸入/輸出數:121 程序存儲器容量:384KB（384K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數據轉換器:A/D 34x10b，D/A 2x8b 振蕩器型:內部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤 產品目錄頁面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
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