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參數資料
| 型號： | W6692 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數： | 2/84頁 |
| 文件大小： | 473K |
| 代理商： | W6692 |
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W6692
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7.7 B Channel HDLC Controller..................................................................................................................32
7.7.1 Reception of Frames in B Channel..................................................................................................32
7.7.2 Transmission of Frames in B Channel.............................................................................................33
7.8 GCI Mode Serial Interface Bus.............................................................................................................34
7.8.1 GCI Mode C/I Channel Handling .....................................................................................................35
7.8.2 GCI Mode Monitor Channel Handling ..............................................................................................35
7.9 PCI Interface Circuit..............................................................................................................................36
7.9.1 PCI Slave Mode And Configuration Serial EEPROM........................................................................36
7.9.2 Cascade Structure of Interrupt Sources...........................................................................................39
7.10 Peripheral Control...............................................................................................................................41
8. REGISTER DESCRIPTIONS....................................................................................................... 42
8.1 Chip Control and D_ch HDLC controller...............................................................................................42
8.1.1 D_ch receive FIFO D_RFIFO Read Address 00H ............................................................................44
8.1.2 D_ch transmit FIFO D_XFIFO Write Address 04H...........................................................................44
8.1.3 D_ch command register D_CMDR Write Address 08H ....................................................................44
8.1.4 D_ch Mode Register D_MODE Read/Write Address 0CH ................................................................45
8.1.5 D_ch Timer Register D_TIMR Read/Write Address 10H ..................................................................46
8.1.6 Interrupt Status Register ISTA Read_clear Address 14H...............................................................46
8.1.7 Interrupt Mask Register IMASK R/W Address 18H...........................................................................48
8.1.8 D_ch Extended Interrupt Register D_EXIR Read_clear Address 1CH...............................................48
8.1.9 D_ch Extended Interrupt Mask Register D_EXIM Read/Write Address 20H......................................49
8.1.10 D_ch Status Register D_STAR Read Address 24H......................................................................49
8.1.11 D_ch Receive Status Register D_RSTA Read Address 28H..........................................................50
8.1.12 D_ch SAPI Address Mask D_SAM Read/Write Address 2CH........................................................50
8.1.13 D_ch SAPI1 Register D_SAP1 Read/Write Address 30H ..............................................................50
8.1.14 D_ch SAPI2 Register D_SAP2 Read/Write Address 34H ...............................................................51
8.1.15 D_ch TEI Address Mask D_TAM Read/Write Address 38H...........................................................51
8.1.16 D_ch TEI1 Register D_TEI1 Read/Write Address 3CH.................................................................51
8.1.17 D_ch TEI2 Register D_TEI2 Read/Write Address 40H..................................................................51
8.1.18 D_ch Receive Frame Byte Count High D_RBCH Read Address 44H.............................................52
8.1.19 D_ch Receive Frame Byte Count Low D_RBCL Read Address 48H..............................................52
8.1.20 Timer 2 TIMR2 Write Address 4CH .................................................................................52
8.1.21 Layer 1_Ready Code L1_RC Read/Write Address 50H......................................................53
8.1.22 D_ch Control Register D_CTL Read/Write Address 54H................................................................53
8.1.23 Command/Indication Receive Register CIR Read Address 58H ....................................................54
8.1.24 Command/Indication Transmit Register CIX Write Address 5CH ..................................................55
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
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