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參數(shù)資料
| 型號(hào)： | W48C54A |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Frequency Synthesizers(頻率合成器) |
| 中文描述： | 頻率合成器（頻率合成器） |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 146K |
| 代理商： | W48C54A |
W48C54A/55A
3
Overview
The W48C54A and W48C55A are general-purpose clock gen-
erator ICs. Some of the standard device options described in
this document are designed for PC motherboard and embed-
ded applications. Backward compatible with the W48C54 and
W48C55, these dual-PLL clock devices incorporate an im-
proved crystal oscillator as well as other refinements. On-chip
loop filter components ensure stable operation even with the
noise typical of a digital system. Device functionality, including
input/output options and frequency selection is determined by
a single metal mask that allows quick-turn customization ca-
pability. Both 3.3- and 5-volt operation are supported.
The improved crystal oscillator of the W48C54A and
W48C55A most notably provides improved duty cycle at the
reference output(s). With this new design, duty cycle is not
affected by varying operating conditions such as with the ad-
dition of external crystal load capacitors. Clock jitter from the
14.318-MHz output(s) is also improved, as is the crystal oscil-
lation frequency accuracy.
Like the W48C54 and W48C55, the W48C54A and W48C55A
have a unique power-on delay circuit. This feature allows com-
patibility with certain microprocessor devices that cannot with-
stand clock input toggling until full supply voltage is reached.
Upon application of power to the V
DD
pins, the W48C54A/55A
output clocks are delayed (held LOW) for approximately 15 ms,
after which they assume normal operation.
Functional Description
The Functional Block Diagram shows the reference clock
source can be a crystal connected across the X1 and X2 input
pins, alternatively input clock connected to the X1 input pin. In
the latter case, the X2 pin is left open. With either source as
reference, both the W48C54A and W48C55A generate all nec-
essary clocks at their respective frequencies to drive the spec-
ified clocks. To provide the broadest possible range of frequen-
cies typically required for CPU mother-board designs, the
target frequencies can be selected via up to four select inputs.
Consult the appropriate tables for the clock selection range. In
addition, the W48C54A/55A can provide rebuffered reference
clock outputs.
Both the W48C54A and W48C55A offer smooth transitions
when changing CPU/2XCPU output frequency. This feature
can best be used by power management systems where it is
frequently necessary to slow down the clock to conserve pow-
er. By controlling the rate of frequency transition, both devices
are designed to be compatible with Intel
cycle-to-cycle pro-
cessor timing specifications.
Power down capability is available in selected versions of the
W48C54A and W48C55A. When PD is active (LOW), the de-
vice is placed in a standby mode during which power dissipa-
tion is at its minimum; all clock outputs are forced LOW. Partial
power is also an available option, wherein selected outputs are
disabled or enabled according to a logic input.
Table 1. Frequency Selection for W48C54A
-05
-09
-59
FS1
0
FS0
0
CPU (MHz) CPU (MHz) CPU (MHz)
47.000
54.000
50.113
0
1
47.000
18.800
40.568
1
0
27.000
27.000
66.817
1
1
36.000
36.000
33.409
Input/REF
20
20
14.318
Table 2. Frequency Selection for W48C55A
-61
FS2
FS1
FS0
2XCPU
(MHz)
CPU
(MHz)
0
0
0
8
4
0
0
1
16
8
0
1
0
32
16
0
1
1
40
20
1
0
0
50
25
1
0
1
66.66
33.33
1
1
0
80
40
50
[1]
1
1
1
100
[1]
Note:
1.
Not guaranteed when V
DD
< 4.5V.
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PDF描述 |
|---|---|
| W48S101-04 | Spread Spectrum Motherboard Frequency Generator(寬頻譜主板頻率發(fā)生器) |
| W48S101 | Spread Spectrum Motherboard Frequency Generator |
| W48S111-14 | Spread Spectrum Desktop/Notebook System Frequency Generator(寬頻譜桌上型/筆記本系統(tǒng)頻率發(fā)生器) |
| W48S111 | Spread Spectrum Desktop/Notebook System Frequency Generator |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W48C54A-05G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| W48C54A-09G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| W48C54A-59G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| W48C55A-61G | 制造商:Cypress Semiconductor 功能描述:TTD 'W' 2 PLL PARTS |
| W48C60203GTR | 制造商:IC WORKS 功能描述:* |
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