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參數(shù)資料
型號: W3EG7264S202JD3
英文描述: 512MB - 64Mx72 DDR SDRAM UNBUFFERED
中文描述: 512MB的- 64Mx72 DDR SDRAM內(nèi)存緩沖
文件頁數(shù): 5/11頁
文件大小: 185K
代理商: W3EG7264S202JD3
5
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
May 2005
Rev. 5
W3EG7264S-JD3-D3
PRELIMINARY
I
DD
SPECIFICATIONS AND TEST CONDITIONS
DDR333, 266, 200: V
CC
= V
CCQ
= +2.5V ± 0.2V; DDR400: V
CC
= V
CCQ
= +2.6V ± 0.1V
Includes DDR SDRAM component only
Parameter
Operating Current
Symbol Conditions
I
DD0
One device bank; Active - Precharge;
t
=t
(MIN); t
=t
(MIN); DQ,DM
and DQS inputs changing once per
clock cycle; Address and control
inputs changing once every two
cycles.
I
DD1
One device bank; Active-Read-
Precharge Burst = 2; t
=t
(MIN);
t
=t
(MIN); l
= 0mA; Address
and control inputs changing once per
clock cycle.
I
DD2P
All device banks idle; Power-down
mode; t
CK
=t
CK
(MIN); CKE=(low)
I
DD2F
CS# = High; All device banks idle;
t
=t
(MIN); CKE = high; Address
and other control inputs changing
once per clock cycle. V
IN
= V
REF
for
DQ, DQS and DM.
I
DD3P
One device bank active; Power-
Down mode; t
CK
(MIN); CKE=(low)
I
DD3N
CS# = High; CKE = High; One device
bank; Active-Precharge; t
=t
(MAX); t
=t
(MIN); DQ, DM and
DQS inputs changing twice per clock
cycle; Address and other control
inputs changing once per clock cycle.
I
DD4R
Burst = 2; Reads; Continuous burst;
One device bank active; Address
and control inputs changing once
per clock cycle; T
CK
= T
CK
(MIN); l
OUT
= 0mA.
I
DD4W
Burst = 2; Writes; Continuous burst;
One device bank active; Address
and control inputs changing once per
clock cycle; t
=t
(MIN); DQ,DM
and DQS inputs changing once per
clock cycle.
I
DD5
t
RC
= t
RC
(MIN)
I
DD6
CKE
0.2V
I
DD7A
Four bank interleaving Reads (BL=4)
with auto precharge with t
=t
(MIN); t
=t
(MIN); Address and
control inputs change only during
Active Read or Write commands.
DDR400@
CL=3
Max
DDR333@
CL=2.5
Max
DDR266@
CL=2
Max
DDR266@
CL=2.5
Max
DDR200@
CL=2
Max
Units
1395
1170
1170
1170
1170
mA
Operating Current
1665
1440
1440
1440
1440
mA
Precharge Power-
Down Standby Current
Idle Standby Current
45
45
45
45
45
rnA
495
405
405
405
405
mA
Active Power-Down
Standby Current
Active Standby Current
405
315
315
315
315
mA
540
450
450
450
450
mA
Operating Current
1710
1485
1485
1485
1485
mA
Operating Current
1758
1575
1575
1575
1575
rnA
Auto Refresh Current
Self Refresh Current
Operating Current
3105
45
2610
45
2610
45
2610
45
2610
45
mA
mA
4050
3645
3645
3645
3645
mA
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