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參數資料
| 型號： | W28F641TT80L |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 64MBIT (4MBIT 】 16) PAGE MODE DUAL WORK FLASH MEMORY |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PDSO48 |
| 封裝： | 12 X 20 MM, TSOP-48 |
| 文件頁數： | 4/31頁 |
| 文件大?。?/td> | 389K |
| 代理商： | W28F641TT80L |
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W28F641B/T
Table 1. Pin Descriptions
SYMBOL
TYPE
NAME AND FUNCTION
A0
A21
INPUT
ADDRESS INPUTS
: Inputs for addresses. 64M: A0
A21.
DQ0
DQ15
INPUT/
OUTPUT
DATA INPUT/OUTPUTS
: Inputs data and commands during CUI (Command User
Interface) write cycles, outputs data during memory array, status register, query code,
identifier code and partition configuration register code reads. Data pins float to high
impedance (High Z) when the chip or outputs are deselected. Data is internally
latched during an erase or program cycle.
#CE
INPUT
CHIP ENABLE
: Activates the device’s control logic, input buffers, decoders and
sense amplifiers. #CE-high (V
IH
) deselects the device and reduces power
consumption to standby levels.
#RESET
INPUT
RESET
: When low (V
IL
), #RESET resets internal automation and inhibits write
operations, which provides data protection. #RESET-high (V
IH
) enables normal
operation. After power-up or reset mode, the device is automatically set to read array
mode. #RESET must be low during power-up/down.
#OE
INPUT
OUTPUT ENABLE
: Gates the device’s outputs during a read cycle.
#WE
INPUT
WRITE ENABLE
: Controls writes to the CUI and array blocks. Addresses and data
are latched on the rising edge of #CE or #WE (whichever goes high first).
#WP
INPUT
WRITE PROTECT
: When #WP is V
IL
, locked-down blocks cannot be unlocked. Erase
or program operation can be executed to the blocks which are not locked and not
locked-down. When #WP is V
IH
, lock-down is disabled.
V
PP
INPUT
MONITORING POWER SUPPLY VOLTAGE:
V
PP
is not used for power supply pin.
With V
PP
≤
V
PPLK
, block erase, full chip erase, (page buffer) program or OTP program
cannot be executed and should not be attempted.
Applying 12V ±0.3V to V
PP
provides fast erasing or fast programming mode. In this
mode, V
PP
is power supply pin. Applying 12V ±0.3V to V
PP
during erase/program can
only be done for a maximum of 1,000 cycles on each block. V
PP
may be connected to
12V ±0.3V for a total of 80 hours maximum. Use of this pin at 12V beyond these
limits may reduce block cycling capability or cause permanent damage.
V
DD
SUPPLY
DEVICE POWER SUPPLY
: With V
DD
≤
V
LKO
, all write attempts to the flash memory
are inhibited. Device operations at invalid V
DD
voltage (see DC Characteristics)
produce spurious results and should not be attempted.
V
DDQ
SUPPLY
INPUT/OUTPUT POWER SUPPLY (2.7V to 3.6V):
Power supply for all input/output
pins.
V
SS
SUPPLY
GROUND
: Do not float any ground pins.
- 4 -
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