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參數(shù)資料
| 型號： | W27L02 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| 中文描述： | 256K × 8電可擦寫存儲器的盟友 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大小： | 355K |
| 代理商： | W27L02 |
W27L02
Publication Release Date: February 20, 2003
- 3 -
Revision A3
Standby Mode
The standby mode significantly reduces V
DD
current. This mode is entered when #CE high. In standby
mode, all outputs are in a high impedance state, independent of #OE and #PGM.
Two-line Output Control
Since EPROMs are often used in large memory arrays, the W27L02 provides two control inputs for
multiple memory connections. Two-line control provides for lowest possible memory power dissipation
and ensures that data bus contention will not occur.
System Considerations
EPROM power switching characteristics require careful device decoupling. System designers are
concerned with three supply current issues: standby current levels (I
SB
), active current levels (I
CC
), and
transient current peaks produced by the falling and rising edges of #CE. Transient current magnitudes
depend on the device output's capacitive and inductive loading. Two-line control and proper decoupling
capacitor selection will suppress transient voltage peaks. Each device should have a 0.1
μ
F ceramic
capacitor connected between its V
DD
and Vss. This high frequency, low inherent-inductance capacitor
should be placed as close as possible to the device. Additionally, for every eight devices, a 4.7
μ
F
electrolytic capacitor should be placed at the array's power supply connection between V
DD
and Vss.
The bulk capacitor will overcome voltage slumps caused by PC board trace inductances.
Table of Operating Modes
V
DD
= 3.3V
±
10%, Vpp = Vp
E
= V
HH
= 12V, V
CP
= V
PE
= V
CE
= 5V, X = V
IH
or V
IL
PINS
MODE
#CE
#OE
#PGM
A0
A9
OTER
ADDR
X
X
X
V
DD
V
PP
OUTPUTS
Read
Output Disable
Standby (TTL)
V
IL
V
IL
V
IH
V
DD
±
0.3V
V
IL
V
IL
V
IH
V
IL
V
IL
V
IH
X
X
X
X
X
X
X
X
X
X
V
DD
V
DD
D
OUT
V
DD
V
DD
High Z
V
DD
V
DD
High Z
Standby (CMOS)
X
X
X
X
X
V
DD
V
DD
High Z
Program
Program Verify
Program Inhibit
Erase1
V
IH
V
IL
X
V
IH
V
IL
V
IH
X
V
IL
X
X
X
V
IL
X
X
X
X
X
X
V
CP
V
PP
D
IN
V
CP
V
PP
D
OUT
V
CP
V
PP
High Z
V
CE
V
PE
FF (Hex)
V
PE
V
IL
V
IH
V
IL
First command:
Addr. = 5555 (hex)
Second command:
Addr. = 2AAA (hex)
X
X
X
X
V
CE
V
CP
AA (Hex)
Erase2
V
CE
V
CP
10 (Hex)
Erase Verify
Erase Inhibit
Product Identifier -
Manufacturer
Product Identifier -
Device
V
IL
V
IH
V
IL
X
V
IH
X
X
X
V
PE
V
PP
D
OUT
V
CE
V
PE
High Z
V
IL
V
IL
X
V
IL
V
HH
X
V
DD
V
DD
DA (Hex)
V
IL
V
IL
X
V
IH
V
HH
X
V
DD
V
DD
85 (Hex)
相關PDF資料 |
PDF描述 |
|---|---|
| W27L02P-70 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02P-90 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-70 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-90 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L520S-70 | 64K X 8 ELECTRICALLY ERASABLE EPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| W27L02P-70 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02P-90 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-70 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-90 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L520 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 8 ELECTRICALLY ERASABLE EPROM |
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