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參數資料
| 型號： | W27L02 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| 中文描述： | 256K × 8電可擦寫存儲器的盟友 |
| 文件頁數： | 2/15頁 |
| 文件大小： | 355K |
| 代理商： | W27L02 |
W27L02
- 2 -
6. FUNCTIONAL DESCRIPTION
Read Mode
Like conventional UVEPROMs, the W27L02 has two control functions and both of these produce data at
the outputs.
#CE is for power control and chip select. #OE controls the output buffer to gate data to the output pins.
When addresses are stable, the address access time (T
ACC
) is equal to the delay from #CE to output
(T
CE
), and data are available at the outputs T
OE
after the falling edge of #OE, if T
ACC
and T
CE
timings
are met.
Erase Mode
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs,
which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half an
hour), the W27L02 uses electrical erasure. Generally, the chip can be erased within 100 mS by using an
EPROM writer with a special erase algorithm.
There are two ways to enter Erase mode. One is to raise V
PP
to V
PE
(12V), V
DD
= V
CE
(5V), #CE low,
#OE high, A9 = V
HH
(12V), and all other address pins are kept at fixed low or high. Pulsing #PGM low
starts the erase operation. The other way is somewhat like flash, by programming two consecutive
commands into the device and then enter Erase mode. The two commands are loading Data = AA(hex)
to Addr. = 5555(hex) and Data = 10(hex) to Addr. = 2AAA(hex). Be careful to note that the #PGM pulse
widths of these two commands are different: One is 100
μ
S, while the other is 100 mS. Please refer to
the Smart Erase Algorithm 1 & 2.
Erase Verify Mode
After an erase operation, all of the bytes in the chip must be verified to check whether they have been
successfully erased to "1" or not. The erase verify mode automatically ensures a substantial erase
margin. This mode will be entered after the erase operation if V
DD
= V
PE
(5V), #CE low, and #OE low,
#PGM
high
.
Program Mode
Programming is performed exactly as it is in conventional UVEPROMs, and programming is the only
way to change cell data from "1" to "0." The program mode is entered when V
PP
is raised to V
PP
(12V),
V
DD
= V
CP
(5V), #CE low, #OE high, the address pins equal the desired addresses, and the input pins
equal the desired inputs. Pulsing #PGM low starts the programming operation.
Program Verify Mode
All of the bytes in the chip must be verified to check whether they have been successfully programmed
with the desired data or not. Hence, after each byte is programmed, a program verify operation should
be performed. The program verify mode automatically ensures a substantial program margin. This mode
will be entered after the program operation if V
PP
= V
PP
(12V), #CE low, #OE low
,
and #PGM high.
Erase/Program Inhibit
Erase or program inhibit mode allows parallel erasing or programming of multiple chips with different
data. When #CE high , erasing or programming of non-target chips is inhibited, so that except for the
#CE, the W27L02 may have common inputs.
相關PDF資料 |
PDF描述 |
|---|---|
| W27L02P-70 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02P-90 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-70 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-90 | 256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L520S-70 | 64K X 8 ELECTRICALLY ERASABLE EPROM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W27L02P-70 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02P-90 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-70 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L02Q-90 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K X 8 ELECTRIC ALLY ERASABLE EPROM |
| W27L520 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 8 ELECTRICALLY ERASABLE EPROM |
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