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參數資料
| 型號： | FM24C256-SE |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 256Kb FRAM Serial Memory |
| 中文描述： | 的256Kb FRAM的串行存儲器 |
| 文件頁數： | 6/13頁 |
| 文件大?。?/td> | 115K |
| 代理商： | FM24C256-SE |
FM24C256
Rev 1.3
Feb. 2004
Page 6 of 13
S
A
Slave Address
0
Address MSB
A
Data Byte
A
P
By Master
By FM24C256
Start
Address & Data
Stop
Acknowledge
Address LSB
A
X
Figure 5. Single Byte Write
S
A
Slave Address
0
Address MSB
A
Data Byte
A
P
By Master
By FM24C256
Start
Address & Data
Stop
Acknowledge
Address LSB
A
X
Data Byte
A
Figure 6. Multiple Byte Write
Read Operation
There are two types of read operations. They are
current address read and selective address read. In a
current address read, the FM24C256 uses the internal
address latch to supply the address. In a selective
read, the user performs a procedure to set the address
to a specific value.
Current Address & Sequential Read
As mentioned above the FM24C256 uses an internal
latch to supply the address for a read operation. A
current address read uses the existing value in the
address latch as a starting place for the read
operation. The system reads from the address
immediately following that of the last operation.
To perform a current address read, the bus master
supplies a device address with the LSB set to 1. This
indicates that a read operation is requested. After
receiving
the
complete
FM24C256 will begin shifting out data from the
current address on the next clock. The current address
is the value held in the internal address latch.
Beginning with the current address, the bus master
can read any number of bytes. Thus, a sequential read
is simply a current address read with multiple byte
transfers. After each byte, the internal address
counter will be incremented.
Each time the bus master acknowledges a byte, this
indicates that the FM24C256 should read out the next
sequential byte.
There are four ways to properly terminate a read
operation. Failing to properly terminate the read will
device
address,
the
most likely create a bus contention as the FM24C256
attempts to read out additional data onto the bus. The
four valid methods are as follows.
1. The bus master issues a no-acknowledge in the
9
th
clock cycle and a stop in the 10
th
clock cycle.
This is illustrated in the diagrams below. This is
preferred.
2. The bus master issues a no-acknowledge in the
9
th
clock cycle and a start in the 10
th
.
3. The bus master issues a stop in the 9
th
clock
cycle.
4. The bus master issues a start in the 9
th
clock
cycle.
If the internal address reaches 7FFFh, it will wrap
around to 0000h on the next read cycle. Figures 7 and
8 show the proper operation for current address reads.
Selective (Random) Read
There is a simple technique that allows a user to
select a random address location as the starting point
for a read operation. This involves using the first
three bytes of a write operation to set the internal
address followed by subsequent read operations.
To perform a selective read, the bus master sends out
the device address with the lsb set to 0. This specifies
a write operation. According to the write protocol,
the bus master then sends the address bytes that are
loaded into the internal address latch. After the
FM24C256 acknowledges the address, the bus master
issues a Start condition. This simultaneously aborts
the write operation and allows the read command to
be issued with the device address LSB set to a 1. The
operation is now a current address read.
相關PDF資料 |
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|---|---|
| FM24C256LZYYX | 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect |
| FM24C256FLZYYX | 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect |
| FM24C256 | 256K-Bit 2-Wire Bus Interface Serial EEPROM with Write Protect(帶寫保護的256K位的兩線控制總線接口串行EEPROM) |
| FM24C256LZEYYX | 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect |
| FM24C256FLZEYYX | 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect |
相關代理商/技術參數 |
參數描述 |
|---|---|
| FM24C256-SETR | 功能描述:F-RAM 256K (32Kx8) 5V RoHS:否 存儲容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM24C256VM8 | 功能描述:電可擦除可編程只讀存儲器 SOIC-8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數據保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| FM24C256VM8X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| FM24C256VN | 功能描述:電可擦除可編程只讀存儲器 DIP-8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數據保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| FM24C256YYX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect |
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