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The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission from
Winbond.
1110-0001-08-A
Memory Interface
Pin Name
Pin Number
Type
Description
CD2#
118
IU
Card Detected 2 from CompactCard
CD1#
118
B
Card Detected 1 from Compact Card.
In test mode 0 this pin is external Instruction ROM CS_ and in
test mode 1 used as internal Instruction ROM0 CS_
BUSY#
120
IU
External Flash RDY/BUSY_ signal. In test mode 1 this pin used
as internal SRAM2 CS_
WAIT#
121
IU
Wait state insert signal used to lengthen the external data
memory bus cycle
VS#
123
I
″
Voltage sense 1
″
from CompactFlash Card. This signal should
be grounded by CFC to indicate initially 3.3V operation
CF_RST /
WP#
124
B
CompactFlash Card reset or SmartMedia Write-Protect signal.
This signal is direct drive by the register CF_RST or WP# on
0x3e03.
In test mode 0 is used as external 2nd data memory CS_. In test
mode 1 is used as internal 2nd data ROM CS_
REG# /
ALE
125
O
CompactFlash REG# signal, this signal direct inverse drive by
register REG_EN on 0x3e03
SmartMedia Flash ALE , indicate address cycle
CE2# /
CLE
126
O
CE2# is one of external memory CS_ signal. It active if external
memory access and register CE2_EN on 0x3e03 is enable
SmartMedia Flash CLE, indicate command cycle.
CE1#
127
O
CE1# is one of external memory CS_ signal. It active if external
memory access and register CE1_EN on 0x3e03 is enable
CE0#
128
B
CE0# is one of external memory CS# signal. It active if external
memory access and register CE0_EN on 0x3e03 is enable
In test mode 0 is used as external 1st data memory CS_. In test
mode 1 is used as internal 1st data RAM CS#
OE#
1
B
External memory OE# signal