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參數資料
| 型號： | W81E381 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | FULL SPEED USB INTEGRATED MICROCONTROLLER |
| 中文描述： | 全速USB集成微控制器 |
| 文件頁數： | 17/63頁 |
| 文件大小： | 695K |
| 代理商： | W81E381 |
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W81E381D/W81E381AD
Publication Release Date: January 2002
- 17 - Revision 0.52
continued
Bit
Number
3
Bit
Mnemonic
URST
Function
USB Reset Flag:
This flag will be set by hardware when a USB reset occurs and completes,
regardless of when the EFSR bit in the IEN1 register is enabled or
disabled. The URST also serves as the interrupt bit, “Or”ed with FRSM and
FSUS bits to generate an interrupt. Should be cleared by firmware when
serving the USB reset interrupt.
Function Remote Wake-up Bit:
This bit is used by the function to issue an wake-up signal (K) to host when
uC is interrupt by the FWKP=1. Set by firmware to make driving resume
signal. It will be cleared by hardware when remote-wakeup is completed.
FW can poll and wait FRWU=0 to know the completion of remote-wakeup.
Note: Don't set this bit unless the function is suspended (FSUS=1 and
FRSM=0).
Function Resume Bit:
1= resume. Set by hardware when “start” or “end” of up stream port resume
is occurred. This bit is “Or”ed with FSUS to generate the interrupt. Cleared
by firmware when servicing the function suspend/resume interrupt.
Note: This bit is not set if remote wakeup is active (FRWU=1). Firmware
should prioritize FRSM over FSUS if both bits are set simultaneously.
Function Suspend Bit:
1= suspend. Set by hardware when the device is set to suspend. This bit is
“Or”ed with FRSM to generate the interrupt. During the function suspend
ISR, firmware should set the FPD bit to enter the suspend mode. Cleared
by hardware when a function resume occurs.
2
FRWU
1
FRSM
0
FSUS
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