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參數資料
型號: W77E58P-25
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 8 BIT MICROCONTROLLER
中文描述: 8-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數: 71/85頁
文件大小: 570K
代理商: W77E58P-25
Preliminary W77E58
Publication Release Date: March 1999
- 71 - Revision A1
When the software writes AAh to the TA SFR, a counter is started. This counter waits for 3 machine
cycles looking for a write of 55h to TA. If the second write (55h) occurs within 3 machine cycles of the
first write (AAh), then the timed access window is opened. It remains open for 3 machine cycles,
during which the user may write to the protected bits. Once the window closes the procedure must be
repeated to access the other protected bits.
Examples of Timed Assessing are shown below.
Example 1: Valid access
MOV
MOV
MOV
TA, #0AAh
TA, #055h
WDCON, #00h 3 M/C
3 M/C
3 M/C
Note: M/C = Machine Cycles
Example 2: Valid access
MOV
MOV
NOP
SETB
TA, #0AAh
TA, #055h
3 M/C
3 M/C
1 M/C
2 M/C
EWT
Example 3: Invalid access
MOV
MOV
NOP
NOP
CLR
TA, #0AAh
TA, #055h
3 M/C
3 M/C
1 M/C
1 M/C
2 M/C
POR
Example 4: Invalid Access
MOV
NOP
MOV
SETB
TA, #0AAh
3 M/C
1 M/C
3 M/C
2 M/C
TA, #055h
EWT
In the first two examples, the writing to the protected bits is done before the 3 machine cycle window
closes. In Example 3, however, the writing to the protected bit occurs after the window has closed,
and so there is effectively no change in the status of the protected bit. In Example 4, the second write
to TA occurs 4 machine cycles after the first write, therefore the timed access window in not opened
at all, and the write to the protected bit fails.
ON-CHIP MTP ROM CHARACTERISTICS
The W77E58 has several modes to program the on-chip MTP ROM. All these operations are
configured by the pins RST, ALE, PSENPSEN, A9CTRL(P3.0), A13CTRL(P3.1), A14CTRL(P3.2),
OECTRL(P3.3), CE(P3.6), OE(P3.7), A0(P1.0) and V
PP
(
EA
). Moreover, the A15
A0(P2.7
P2.0,
P1.7
P1.0) and the D7
D0(P0.7
P0.0) serve as the address and data bus respectively for these
operations.
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