- 您現在的位置：買賣IC網 > PDF目錄363895 > W77E058A40FL (WINBOND ELECTRONICS CORP) 8-BIT MICROCONTROLLER PDF資料下載
參數資料
| 型號： | W77E058A40FL |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | ROHS COMPLIANT, PLASTIC, QFP-44 |
| 文件頁數： | 49/87頁 |
| 文件大小： | 594K |
| 代理商： | W77E058A40FL |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁
W77E058A
Publication Release Date: April 17, 2007
- 49 -
Revision A10
11. INTERRUPTS
The W77E058 has a two priority level interrupt structure with 12 interrupt sources. Each of the
interrupt sources has an individual priority bit, flag, interrupt vector and enable bit. In addition, the
interrupts can be globally enabled or disabled.
11.1 Interrupt Sources
The External Interrupts
INT0
and
INT1
can be either edge triggered or level triggered, depending on
bits IT0 and IT1. The bits IE0 and IE1 in the TCON register are the flags which are checked to
generate the interrupt. In the edge triggered mode, the INTx inputs are sampled in every machine
cycle. If the sample is high in one cycle and low in the next, then a high to low transition is detected
and the interrupts request flag IEx in TCON or EXIF is set. The flag bit requests the interrupt. Since
the external interrupts are sampled every machine cycle, they have to be held high or low for at least
one complete machine cycle. The IEx flag is automatically cleared when the service routine is called.
If the level triggered mode is selected, then the requesting source has to hold the pin low till the
interrupt is serviced. The IEx flag will not be cleared by the hardware on entering the service routine. If
the interrupt continues to be held low even after the service routine is completed, then the processor
may acknowledge another interrupt request from the same source. Note that the external interrupts
INT2 to
INT5
are edge triggered only. By default, the individual interrupt flag corresponding to
external interrupt 2 to 5 must be cleared manually by software. It can be configured with hardware
cleared by setting the corresponding bit HCx in the T2MOD register. For instance, if HC2 is set
hardware will clear IE2 flag after program enters the interrupt 2 service routine.
The Timer 0 and 1 Interrupts are generated by the TF0 and TF1 flags. These flags are set by the
overflow in the Timer 0 and Timer 1. The TF0 and TF1 flags are automatically cleared by the
hardware when the timer interrupt is serviced. The Timer 2 interrupt is generated by a logical OR of
the TF2 and the EXF2 flags. These flags are set by overflow or capture/reload events in the timer 2
operation. The hardware does not clear these flags when a timer 2 interrupt is executed. Software has
to resolve the cause of the interrupt between TF2 and EXF2 and clear the appropriate flag.
The Watchdog timer can be used as a system monitor or a simple timer. In either case, when the
time-out count is reached, the Watchdog timer interrupt flag WDIF (WDCON.3) is set. If the interrupt is
enabled by the enable bit EIE.4, then an interrupt will occur.
The Serial block can generate interrupts on reception or transmission. There are two interrupt sources
from the Serial block, which are obtained by the RI and TI bits in the SCON SFR and RI_1 and TI_1 in
the SCON1 SFR. These bits are not automatically cleared by the hardware, and the user will have to
clear these bits using software.
All the bits that generate interrupts can be set or reset by hardware, and thereby software initiated
interrupts can be generated. Each of the individual interrupts can be enabled or disabled by setting or
clearing a bit in the IE SFR. IE also has a global enable/disable bit EA, which can be cleared to
disable all the interrupts, at once.
相關PDF資料 |
PDF描述 |
|---|---|
| W77E058A40PL | 8-BIT MICROCONTROLLER |
| W77E058A | 8-BIT MICROCONTROLLER |
| W77E468F-25 | 8 BIT MICROCONTROLLER |
| W77E468F-40 | 8 BIT MICROCONTROLLER |
| W77E468 | 8 BIT MICROCONTROLLER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W77E058A40PL | 功能描述:IC MCU 8-BIT 32K FLASH 44-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:W77 標準包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設備:POR，PWM，溫度傳感器，WDT 輸入/輸出數:21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數據轉換器:A/D 6x12b 振蕩器型:內部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| W77E11 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:EXECUTION EX. NO.1 DX CODE ZA |
| W77E468 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 BIT MICROCONTROLLER |
| W77E468F-25 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 BIT MICROCONTROLLER |
| W77E468F-40 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 BIT MICROCONTROLLER |
發布緊急采購，3分鐘左右您將得到回復。