
W741L240
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Input/Output Ports RA, RB
Port RA consists of pins RA.0 to RA.3 and port RB consists of pins RB.0 to RB.3. After initial reset,
input/output ports RA and RB are both in input mode. When RA and RB are used as output ports,
CMOS or NMOS open drain output type can be selected by the PM0 register. Each pin of port RA or
RB can be specified as input or output mode independently by the PM1 and PM2 registers. The
MOVA R, RA or MOVA R, RB instructions operate the input functions and the MOV RA, R or MOV
RB, R operate the output functions. For more details, refer to the instruction table and Figure 8.
I/O PIN
RA.n(RB.n)
DATA
BUS
Buffer
Output
PM0.0 (or PM0.1)
PM1.n
(or PM2.n)
MOVA R, RA
(or MOVA R, RB)
instruction
MOV RA, R
(or MOV RB, R)
Instruction
Enable
Enable
Vdd
Input/Output Pin of the RA(RB)
Figure 8. Architecture of Input/Output Pins
Input Ports RC
Port RC consists of pins RC.0 to RC.3. Each pin of port RC can be connected to a pull-up resistor,
which is controlled by the port mode 0 register (PM0). When the PEF, HEF, and IEF corresponding to
the RC port are set, a signal change on the specified pins of port RC will execute the hold mode
release or interrupt subroutine. Port status register 0 (PSR0) records the status of ports RC, i.e., any
signal changes on the pins that make up the port. PSR0 can be read out and cleared by the MOV R,
PSR0, and CLR PSR0 instructions. In addition, the falling edge signal on the pin of port RC specified
by the instruction MOV SEF, #I will cause the device to exit the stop mode
.
Refer to Figure 9 and the
instruction table for more details. The RD port is used as input port only, it has no hold mode release,
wake-up stop mode or interrupt functions.