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參數(shù)資料
| 型號： | w681511 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | Codec |
| 英文描述： | SINGLE-CHANNEL VOICEBAND CODEC |
| 中文描述： | 單通道聲帶編解碼器 |
| 文件頁數(shù)： | 9/34頁 |
| 文件大小： | 406K |
| 代理商： | W681511 |
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W681511
Publication Release Date: December 4, 2002
- 9 -
Revision A9
AI+
Input Amplifier
Input
V
DD
1.2 to V
DD
-1.2
V
SS
Powered Down
AO
Powered Up
AI+, AI-
Powered Down
AI-
Table 7.1 Input Amplifier Modes of operation
When the input amplifier is powered down, the input signal at AO or AI- needs to be referenced to the
analog ground voltage V
AG
.
The output of the input amplifier is fed through a low-pass filter to prevent aliasing at the switched
capacitor 3.4 kHz low pass filter. The 3.4 kHz switched capacitor low pass filter prevents aliasing of
input signals above 4 kHz, due to the sampling at 8 kHz. The output of the 3.4 kHz low pass filter is
filtered by a high pass filter with a 200 Hz cut-off frequency. The filters are designed according to the
recommendations in the G.712 ITU-T specification. From the output of the high pass filter the signal is
digitized. The signal is converted into a compressed 8-bit digital representation with either
μ
-Law or A-
Law format. The
μ
-Law or A-Law format is pin-selectable through the
μ
/A-Law pin. The compression
format can be selected according to Table 7.2.
μ
/A-Law Pin
Format
V
SS
V
DD
A-Law
μ
-Law
Table 7.2. Pin-selectable Compression Format
The digital 8-bit
μ
-Law or A-Law samples are fed to the PCM interface for serial transmission at the
sample rate supplied by the external frame sync FST.
7.2. Receive Path
The 8-bit digital input samples for the D-to-A path are serially shifted in by the PCM interface and
converted to parallel data bits. During every cycle of the frame sync FSR, the parallel data bits are fed
through the pin-selectable
μ
-Law or A-Law expander and converted to analog samples. The mode of
expansion is selected by the
μ
/A-Law pin as shown in Table 7.2. The analog samples are filtered by a
low-pass smoothing filter with a 3.4 kHz cut-off frequency, according to the ITU-T G.712 specification.
A sin(x)/x compensation is integrated with the low pass smoothing filter. The output of this filter is
buffered to provide the receive output signal RO+. The RO+ output can be externally connected to the
PAI pin to provide a differential output with high driving capability at the PAO+ and PAO- pins. By
using external resistors (see section 11 for examples), various gain settings of this output amplifier
can be achieved. If the transmit power amplifier is not in use, it can be powered down by connecting
PAI to V
DD
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W681511_05 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:SINGLE-CHANNEL VOICEBAND CODEC |
| W681511DK | 功能描述:KIT DEVELOPMENT FOR W681511 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| W681511IS | 制造商:WINBOND 制造商全稱:Winbond 功能描述:SINGLE-CHANNEL VOICEBAND CODEC |
| W681511S | 功能描述:IC VOICEBAND CODEC 5V 1CH 20SOP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| W681511SG | 功能描述:IC VOICEBAND CODEC 5V 1CH 20SOP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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