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參數資料
| 型號： | W6630CR |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DAC |
| 英文描述： | Stereo Audio DAC(立體聲D/A轉換器) |
| 中文描述： | SERIAL INPUT LOADING, 18-BIT DAC, PDSO20 |
| 封裝： | SSOP-20 |
| 文件頁數： | 3/22頁 |
| 文件大小： | 292K |
| 代理商： | W6630CR |
Preliminary W6630CR
Publication Release Date: December 1998
- 3 -
Revision A1
4.2. Analog Interface, continued
PIN NAME
PIN NO.
I/O
FUNCTION
VOR
9
O
This pin is the analog right channel DAC output from output
amplifier.The maximum output voltage for this pin is 0 dB, about
0.62 times AVDD Vpp.
VAGR
8
O
This is the analog signal ground output pin which supplies a 2.5 volt
reference voltage for the right channel DAC output if AVDD is +5
volt typically. This pin should be decoupled to AGND with 10
μ
F
capacitor.
4.3. Digital Interface
PIN NAME
PIN NO.
I/O
FUNCTION
RESET
15
I
This pin the device reset input pin. When it is logic -0, the chip is in
reset status.
XTALI
1
I
This pin is the oscillator input and the system master clock input
pin. It is 384 or 256 times sampling clock rate from FSLR pin(pin
4). It must be synchronized with FSLR pin. For the crystal input, the
XTALO pin(pin 20) must be tied to the other side. For the oscillator
input, the pin is clock input source.
XTALO
20
O
This pin is the oscillator output. For the crystal input, the XTALI
pin(pin 1) must be tied to the other side. For the oscillator input,
the pin is floating and become the inverting XTALI clock.
CLKO
19
O
The pin is the buffered and inverting clock output from XTALI (pin
1).
FSLR
4
I
This pin is an frame sync pulse for the left and right channel. It
enables the 16 or 18 Bit linear DINLR(pin 5) input by BCLK pin(pin
6). It is the sampling clcok, and its valus is 32K, 44.1K, or 48KHz,
typically 44.1 KHz.
BCLK
6
I
This pin is the input bit clock. It shifts data on the DINLR pin into
the chip on the rising edge.
DINLR
5
I
This pin is the 16 or 18 bit linear PCM input data for the left and
right channel controlled by the FSLR and BCLK pins. There are two
formats, normal input and I
2
S input, in the device.
ZERO
7
O
This pin is the zero detection output pin. It is the open drain pin.
When the zero input data is detected, the pin output logic zero;
otherwise, it becomes the high impedance output pin.
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相關代理商/技術參數 |
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| W6631 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:STEREO AUDIO DAC |
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| W66880 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:VFD CONTROLLER/DRIVER |
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