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參數資料
| 型號： | W58103 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | ADPCM Voice Synthesizer(ADPCM話音合成器) |
| 中文描述： | 9 SEC, SPEECH SYNTHESIZER, UUC16 |
| 文件頁數： | 7/41頁 |
| 文件大小： | 195K |
| 代理商： | W58103 |
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W581xx Design Guide
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7 -
FUNCTIONAL DESCRIPTION
1. Instruction Sets
The W581XX family
PowerSpeech
program instruction sets include unconditional and conditional
instructions. Most of these instructions are programmed by writing "LD (Load)" and "JP (Jump)"
commands and by modifying the contents of the R0~R7, EN, STOP, and MODE registers.
Registers
A. R0~R7 Register
Rn (n:0~7) is an 8-bit register that stores the entry values from 0 to 255 voice groups. The structure of
this register is shown below:
Rn:
Bit:
7
6
5
4
3
2
1
0
The default value of Rn is 0.
B. EN Register
EN is an 8-bit register that stores the rising/falling edge enable or disable status information for all
trigger pins. This information determines whether each trigger pin is retriggerable, non-retriggerable,
overwrite, or non-overwrite. The 8-bit structure of this register and the rising or falling edge of the
triggers corresponding to each bit are shown below:
EN:
Bit:
7
6
5
4
3
2
1
0
Trigger:
4r
3r
2r
1r
4f
3f
2f
1f
The digits 1 to 4 represent TG1 to TG4, respectively; "r" represents the rising edge; and "f" represents
the falling edge. When any one of the eight bits is set to "1," the rising or falling edge of the
corresponding trigger pin can be enabled, interrupting the current state.
The default value of EN register is "1111 1111"”.
C. STOP Register
The STOP register stores stop output status information to determine the voltage level of each stop
output pin. The 8-bit structure of this register and the stop output pin corresponding to each bit are
shown below:
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