
W536030T/060T/090T/120T
- 8 -
PAD Description, continued
SYMBOL
I/O
FUNCTION
COM0
COM15
O
LCD common signal output pads either 1/32 duty or 1/16 duty. The LCD
frame rate is controlled by LCDM1 register, and default value LCDM1 =
0111b with 64Hz frame rate.
COM16
COM23
O
LCD common signal output pads while 1/32 duty is active. The LCD
frame rate is controlled by LCDM1 register, and default value LCDM1 =
0111b with 64Hz frame rate.
COM24/PORTP.0
COM27/PORTP.3
O/O
LCD common signal output pads, or shared as general output by
register LCDM3.2 when in 1/16 duty mode. Default function is common
function.
COM28/PORTO.0
COM31/PORTO.3
O/I
LCD common signal output pads, or shared as general input by register
LCDM3.2 when in 1/16 duty mode. Default function is common function
and PM5.2 = 0 to inhibit LCD waveform abnormal.
DH1, DH2 (6)
O
Connection terminal for voltage double capacitor with 0.1uF. The DH2
connects to capacitor positive node and DH1 negative node if polar
capacitor is used.
V3 ~ V6 (6)
O
LCD COM/SEG output driving voltage. Need an external 0.1uF
capacitor to every pad terminal.
V2 (6)
I/O
Voltage regulator output pad. An external capacitor is a must. Output
level can be controlled from 0~Fh by LCDM4 register. If internal pump
is enabled (LCDM3.3 = 0 and default value), LCD operating voltage
(VLCD) will be 4*V2 or 5*V2 depending on 1/4 bias or 1/5 bias. A
limitation should be noted that VLCD must be higher than (V
DD
-0.5v) to
avoid chip leakage current. While external reference voltage is selected
(LCDM3.3 = 1), V2 pad input voltage can not be over 1.5 Volt to inhibit
chip damage.
V
SSP
V
SSA
(7)
V
SS
V
DDP
V
DDA
(7)
V
DD
I
Power ground for PWM or DAC playing output.
I
Power ground. (For w536090/120T only)
I
Power ground
I
Power source for PWM or DAC playing output.
I
Power source. (For w536090/120T only)
I
Power source.
Notes:
(4). RD1~3 are shared as CLK/DATA/ADDR to interface with W55XXX @W536030T/060T
(5). @W536120T only
(6). 0.1uF is default value, and capacitor value should be larger than 0.1uF if LCD dot size over 0.5mm*0.5mm.
(7). External application circuit should connect together, please refer to APPLICATION CIRCUIT. To sure chip operation
properly, please bond all V
, V
, V
, V
SSP
, V
SS
and V
SSA
pads and connect V
SSP
, V
SS
from chip outside PCB circuit.
V
SSA
and V
DDA
are for W536090/120T only
(8). When working at NMOS open drain mode, external pull high voltage can't higher than V
DD
to avoid leakage current.