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參數資料
| 型號： | W52905 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | ADPCM/PCM Voice Synthesizer(ADPCM/PCM話音合成器) |
| 中文描述： | 20 SEC, SPEECH SYNTHESIZER, UUC18 |
| 文件頁數： | 6/40頁 |
| 文件大小： | 190K |
| 代理商： | W52905 |
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W529XX Application Note
- 6 -
To select a SCAN output, the selected output signal is initially set to "0" for keypad scan purposes. After a key is
depressed and debounced successfully, the SCAN outputs return to the "1" state. A low pulse will then start to
ripple according to a pre-defined H/W pattern to identify which key is being pressed. For more information, see
the FUNCTIONAL DESCRIPTION section.
For an LED output, the selected pin flashes with a frequency of 3 Hz or flashes with circular/random effects.
See the FUNCTIONAL DESCRIPTION section for more details.
For a STOP output, the user may define different STOP outputs at certain timing slots by programming the
PowerSpeech
synthesizer *.out files. After compilation, the STOP signals will be controlled by the internal
OUTPUT register. The OUTPUT register can be manipulated through register operations. The STOP signals
are typically used to drive external components.
For INPUT purposes, the status of the selected input pins are latched into the designated register by masking
unselected pins to zeros. In this way, customers may then decide what to do depending on the port status of the
input pins. Actions are invoked through bit manipulation commands like the JP N@reg.m=1 instruction (i.e. This
instruction says that
if the mth bit of the register is equal to 1, then jump to voice group N to execute program.).
Those IO pins that are declared as INPUT pins could be connected to "1", "0", or just left floating. The floating
INPUT pins will be recognized as "0" by the W529XX. The W529XX latches the input status only at the
execution time of the command "MV erg, IPORT" and tri-states the input port elsewhere.
Pin IO8 can also be selected as a frequency test pin (FTEST), provided for some customers to facilitate the
back-end sample rate test at the factory site. The nominal output frequency, F
TEST,
is fixed at 6 KHz on the
condition that the oscillation frequency is equal to 1.5 MHz.
4. OSC
The OSC pin is connected with an R
OSC
resistor to VDD.
5. TEST
The TEST pin is used solely for test purposes.
6. /RESET
Active low reset input with an internal pull-high resistance of 500 K
. A falling edge on the /RESET pin will fully
reset the W529XX in the same way as a power on reset (POR). The /RESET pin was originally used as a last
resort to reset the W529XX in situations where the internal POR circuit of the W529XX does not operate
properly. If customers fail to discharge the VDD to ground and repower up the W529XX, the chip may function
abnormally, causing unpredictable operations. Users may then reset the W529XX by sending a pulse through
the /RESET pin.
7. VDD
Positive power supply.
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相關代理商/技術參數 |
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| W530-02HT | 制造商:Cypress Semiconductor 功能描述: |
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