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參數資料
型號: W528S05
廠商: WINBOND ELECTRONICS CORP
元件分類: 音頻合成
英文描述: ADPCM VOICE SYNTHESIZER
中文描述: 5 SEC, SPEECH SYNTHESIZER, UUC12
封裝: DIE-12
文件頁數: 6/17頁
文件大小: 529K
代理商: W528S05
W528SXX
- 6 -
Instructions are programmed by writing LOAD and JUMP commands into the R0, EN, STOP, and
MODE registers.
Unconditional Instructions:
1. LOAD (LD) Command:
LD R0, value:
This instruction is used to load a voice-group entry value into register R0. The voice-group entry value
may range from 0 to 255. The initial value of the R0 register is "00000000."
LD EN, operand:
This instruction is used to define the trigger interrupt settings by loading the operand message into
register EN. The initial value of the EN register is "11111111."
a. The operand is an 8-bit value that can be entered in decimal (default) or hexadecimal
(with "0x" as a prefix).
b. EN is an 8-bit register that is used to enable/disable the rising/falling edge of each of the four
trigger inputs.
The 8 bits correspond to the rising/falling edges of the triggers as shown below:
Bit:
7
6
5
4
3
2
1
0
TG:
4R
3R
2R
1R
4F
3F
2F
1F
where "nR/F" represents the rising/falling edge of the n-th trigger pin.
c. When any one of the eight bits is set to "1" (default), the corresponding trigger will interrupt the
current state at the edge indicated. When the bits are set to "0," the triggers will be disabled.
d. The voice group entry addresses correspond to the interrupt vectors as follows:
TG:
4R
3R
2R
1R
4F
3F
2F
1F
Group:
7
6
5
4
3
2
1
0
EXAMPLE:
The instruction "LD EN, 0x41" is programmed.
EXPLANATION:
a. "41" is a hexadecimal value equal to the binary value "0100 0001."
b. These 8 bits of data represent the following trigger interrupt settings:
4R,
0
3R,
1
2R,
0
1R,
0
4F,
0
3F,
0
2F,
0
1F
1
RESULT:
a. When the rising edge of TG3 (3R) is activated, the EN register will cause TG3 to interrupt the
current playing state and jump immediately to voice group 6, the voice group that corresponds
to 3R.
相關PDF資料
PDF描述
W528S08A ADPCM VOICE SYNTHESIZER
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