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參數資料
| 型號： | W48C20 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Audio Subsystem Clock Generator(音頻子系統時鐘發生器) |
| 中文描述： | 音頻子系統時鐘發生器（音頻子系統時鐘發生器） |
| 文件頁數： | 2/4頁 |
| 文件大?。?/td> | 92K |
| 代理商： | W48C20 |
W48C20
2
External Components/Crystal Selection
The W48C20 incorporates a crystal oscillator circuit designed
to provide 50% duty cycle over a range of operating conditions,
including the addition of external crystal load capacitors to pins
X1 and X2. A parallel resonant 14.318-MHz, 12-pF load crystal
is recommended. A series-resonant crystal or a parallel reso-
nant crystal specifying a different load can be used, but either
will result in frequencies which are slightly different from the
ideal (up to 0.06%).
The crystal load capacitance can be increased by adding a
capacitor to each of the X1 and X2 pins and ground. This en-
ables the use of a crystal specifying a load greater than 12 pF
without changing the output frequency.
Duty cycle is also maintained when using an external clock
source (connected to X1, X2 left unconnected) as long as the
external clock has good duty cycle. The circuit exhibits about
50% less clock jitter from the 14.318-MHz output when com-
pared to similar devices.
Pin Definitions
Pin Name
Pin No.
Pin Type
Pin Description
X1
1
I
Crystal connection or external clock frequency input (14.318 MHz).
VDD
2
P
Power supply connection.
GND
3
P
Ground connection.
OUTPUT
4
O
16.9344-MHZ clock output for stereo codec.
OUTPUT
5
O
24.576-MHz clock output for stereo codec.
OUTPUT
6
O
33.868-MHz clock output for OPL4.
OUTPUT
7
O
14.318-MHz clock buffered output for OPL3 or PCMCIA controller.
X2
8
I
Crystal connection. Leave this pin unconnected when using an external clock.
14.318 MHz IN
2.2
μ
F
(optional)
0.1
μ
F
V
G
33
(optional)
16.9 MHz OUT
24.6 MHz OUT
33
(optional)
33
(optional)
33.9 MHz OUT
14.3 MHz OUT
33
(optional)
Pin 1
2
3
4
5
6
7
8
Figure 1. Suggested Layout
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