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參數(shù)資料
| 型號(hào)： | W42C31-09 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Spread Spectrum Frequency Timing Generator(寬頻譜頻率同步產(chǎn)生器) |
| 中文描述： | 擴(kuò)頻頻率定時(shí)發(fā)生器（寬頻譜頻率同步產(chǎn)生器） |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大小： | 119K |
| 代理商： | W42C31-09 |
W42C31-09
2
Functional Description
The W42C31-09 uses a phase-locked loop (PLL) to frequency
modulate an input clock. The result is an output clock whose
frequency is slowly swept over a narrow band near the input
signal. The basic circuit topology is shown in
Figure 1
. The
input reference signal is divided by Q and fed to the phase
detector. A signal from the VCO is divided by P and fed back
to the phase detector also. The PLL will force the frequency of
the VCO output signal to change until the divided output signal
and the divided reference signal match at the phase detector
input. The output frequency is then equal to the ratio of P/Q
times the reference frequency. (Note: For the W42C31-09 the
output frequency is equal to the input frequency.) The unique
feature of the Spread Spectrum Frequency Timing Generator
is that a modulating waveform is superimposed at the input to
the VCO. This causes the VCO output to be slowly swept
across a predetermined frequency band.
Because the modulating frequency is typically 1000 times
slower than the fundamental clock, the spread spectrum pro-
cess has little impact on system performance.
Frequency Selection With SSFTG
In Spread Spectrum Frequency Timing Generation, EMI re-
duction depends on the shape, modulation percentage, and
frequency of the modulating waveform. While the shape and
frequency of the modulating waveform are fixed, the modula-
tion percentage may be varied.
Using frequency select bits (FS1:0 pins), various spreading
percentages can be chosen (see
Table 1
).
A larger spreading percentage improves EMI reduction. How-
ever, large spread percentages may either exceed system
maximum frequency ratings or lower the average frequency to
a point where performance is affected. For these reasons,
spreading percentages between ±0.5% and ±2.5% are most
common.
The W42C31 features the ability to select from various spread
spectrum
characteristics.
Selections
W42C31-09 are shown in
Table 1
. Other spreading character-
istics are available (see separate data sheets) or can be cre-
ated with a custom mask. Also, other devices in the W42C31
family offer frequency multiplication in addition to the spread
spectrum function. This will allow the use of less expensive
fundamental mode crystals.
specific
to
the
Pin Definitions
Pin Name
Pin No.
Pin
Type
Pin Description
CLKOUT
7
O
Output Modulated Frequency
: Frequency modulated copy of the unmodulated input
clock.
CLKIN
1
I
External Reference Frequency Input
No Connect:
This pin must be left unconnected.
NC
2
I
SSON#
8
I
Spread Spectrum Control (Active LOW):
Pulling this input signal LOW turns the
internal modulation waveform on. This pin has an internal pull-down resistor.
Frequency Selection Bit 0:
These pins select the frequency spreading
characteristics. Refer to
Table 1
. These pins have internal pull-up resistors.
Power Connection:
Connected to 3.3V or 5V power supply.
FS0:1
6, 4
I
VDD
5
P
GND
3
G
Ground Connection:
This should be connected to the common ground plane.
Figure 1. System Block Diagram (Concept, not actual implementation)
Freq.
Divider
Q
Phase
Detector
Modulating
Waveform
VCO
Post
Dividers
CLKOUT
(EMI suppressed)
Charge
Pump
Feedback
DiP
PLL
GND
VDD
Σ
Clock Input
Reference Input
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| W42C31-09G | 制造商:Cypress Semiconductor 功能描述:PLL Frequency Synthesizer Single 8-Pin SOIC |
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| W42C32 | 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Spread Spectrum Frequency Timing Generator |
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| W42C32-05MG | 制造商:Cypress Semiconductor 功能描述:PREMIS EMI REDUCTION SSCGS |
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