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參數資料
| 型號： | W39L040A90B |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 512K 】 8 CMOS FLASH MEMORY |
| 中文描述： | 512K X 8 FLASH 3V PROM, 90 ns, PDIP32 |
| 封裝： | PLASTIC, DIP-32 |
| 文件頁數： | 5/26頁 |
| 文件大?。?/td> | 231K |
| 代理商： | W39L040A90B |
W39L040A
Publication Release Date: April 14, 2005
- 5 -
Revision A3
6. FUNCTIONAL DESCRIPTION
6.1 Device Bus Operation
6.1.1
Read Mode
The read operation of the W39L040A is controlled by #CE and #OE, both of which have to be low for
the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip
is de-selected and only standby power will be consumed. #OE is the output control and is used to
gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is
high. Refer to the timing waveforms for further details.
6.1.2
Device erasure and programming are accomplished via the command register. The contents of the
register serve as inputs to the internal state machine. The state machine outputs dictate the function
of the device.
The command register itself does not occupy any addressable memory location. The register is a
latch used to store the commands, along with the address and data information needed to execute the
command. The command register is written by bringing #WE to logic low state; while #CE is at logic
low state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE,
whichever happens later; while data is latched on the rising edge of #WE or #CE, whichever happens
first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Program Waveforms for specific timing parameters.
Write Mode
6.1.3
Standby Mode
The Standby mode is achieved with the
#CE
input held at
V
DD
±
0.3V and the current is typically reduced to
less than 5
μ
A (max).
In the standby mode the outputs are in the high impedance state, independent of the #OE input.
6.1.4
With the #OE input at a logic high level (V
IH
), output from the device is disabled. This will cause the
output pins to be in a high impedance state.
Output Disable Mode
6.1.5
The auto-select mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended for use by programming equipment for the purpose of
automatically matching the device to be programmed with its corresponding programming algorithm.
This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
(11.5V to 12.5V) on address pin
A9. Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from
V
IL
to V
IH
. All addresses are don
′
t cares except A0 and A1 (see "Auto-select Codes").
The manufacturer and device codes may also be read via the command register, for instance, when
the W39L040A
is erased or programmed in a system without access to high voltage on the A9 pin.
The command sequence is illustrated in "Auto-select Codes".
Auto-select Mode
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