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參數(shù)資料
型號(hào)： W39L010P-90B
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 128K X 8 CMOS FLASH MEMORY
中文描述： 128K X 8 FLASH 3.3V PROM, 90 ns, PQCC32
封裝： PLASTIC, LCC-32
文件頁(yè)數(shù)： 5/27頁(yè)
文件大小： 780K
代理商： W39L010P-90B
W39L010
Publication Release Date: January 9, 2004
- 5 -
Revision A4
6. FUNCTIONAL DESCRIPTION
6.1 Device Bus Operation
6.1.1
Read Mode
The read operation of the W39L010 is controlled by #CE and #OE, both of which have to be low for
the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip
is de-selected and only standby power will be consumed. #OE is the output control and is used to
gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is
high. Refer to the timing waveforms for further details.
6.1.2
Write Mode
Device erasure and programming are accomplished via the command register. The contents of the
register serve as inputs to the internal state machine. The state machine outputs dictate the function
of the device.
The command register itself does not occupy any addressable memory location. The register is a
latch used to store the commands, along with the address and data information needed to execute the
command. The command register is written to bring #WE to logic low state, while #CE is at logic low
state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE,
whichever happens later; while data is latched on the rising edge of #WE or #CE, whichever happens
first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing
parameters.
6.1.3
Standby Mode
There are two ways to implement the standby mode on the W39L010 device, both using the #CE pin.
A CMOS standby mode is achieved with the
#CE
input held at
V
DD
±
0.3V. Under this condition the current
is typically reduced to less than 20
μ
A. A TTL standby mode is achieved with the #CE pin held at V
IH
.
Under this condition the current is typically reduced to 2 mA.
In the standby mode the outputs are in the high impedance state, independent of the #OE input.
6.1.4
Output Disable Mode
With the #OE input at a logic high level (V
IH
), output from the device is disabled. This will cause the
output pins to be in a high impedance state.
6.1.5
Auto-select Mode
The auto-select mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended for use by programming equipment for the purpose of
automatically matching the device to be programmed with its corresponding programming algorithm.
This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
(11.5V to 12.5V) on address pin
A9. Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from
V
IL
to V
IH
. All addresses are don
′
t cares except A0 and A1 (see "Auto-select Codes").
相關(guān)PDF資料
PDF描述
W39L010Q-70 128K X 8 CMOS FLASH MEMORY
W39L010Q-70B 128K X 8 CMOS FLASH MEMORY
W39L010Q-90 128K X 8 CMOS FLASH MEMORY
W39L010Q-90B 128K X 8 CMOS FLASH MEMORY
W39L020P-70 128K X 8 CMOS FLASH MEMORY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W39L010Q-70 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY
W39L010Q-70B 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY
W39L010Q-90 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY
W39L010Q-90B 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY
W39L020 制造商:WINBOND 制造商全稱:Winbond 功能描述:256K 】 8 CMOS FLASH MEMORY
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