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參數資料
型號: W312-02HT
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: FTG for VIA K7 Series Chipset with Programmable Output Frequency
中文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: SSOP-48
文件頁數: 15/21頁
文件大小: 143K
代理商: W312-02HT
W312-02
Document #: 38-07259 Rev. *B
Page 15 of 21
How to Program CPU Output Frequency
When the programmable output frequency feature is enabled
(Pro_Freq_EN bit is set), the CPU output frequency is deter-
mined by the following equation:
Fcpu = G * (N+3)/(M+3)
N
and
M
are the values programmed in Programmable Fre-
quency Select N-Value Register and M-Value Register, re-
spectively.
G
stands for the PLL Gear Constant, which is determined by
the programmed value of FS[4:0] or SEL[4:0]. The value is
listed in
Table 4
. The ratio of (N+3) and (M+3) need to be
greater than
1
[(N+3)/(M+3) > 1].
Table 6
lists set of N and M values for different frequency out-
put ranges.This example use a fixed value for the M-Value
Register and select the CPU output frequency by changing the
value of the N-Value Register.
WD_PRE_SCALER
0 = 150 ms
1 = 2.5 sec
This bit will enable the generation of a Reset pulse when a Watchdog timer time-out occurs.
0 = Disabled
1 = Enabled
This bit will enable the generation of a Reset pulse after a frequency change occurs.
0 = Disabled
1 = Enabled
RST_EN_WD
RST_EN_FC
Table 5. Register Summary
(continued)
Name
Description
Table 6. Examples of N and M Value for Different CPU Frequency Range
Frequency Ranges
Gear Constants
Fixed Value for
M-Value Register
Range of N-Value Register
for Different CPU Frequency
50 MHz
129 MHz
48.00741
93
97
255
130 MHz
248 MHz
48.00741
48
127
245
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