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參數(shù)資料
| 型號： | MM54HCT109J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual J-K Flip-Flops with Preset and Clear |
| 中文描述： | HCT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 |
| 封裝： | DIP-16 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 123K |
| 代理商： | MM54HCT109J |
TL/F/5361
M
January 1988
MM54HCT109/MM74HCT109
Dual J-K Flip-Flops with Preset and Clear
General Description
These high speed J-K FLIP-FLOPS utilize advanced silicon-
gate CMOS technology. They possess the low power con-
sumption and high noise immunity of standard CMOS inte-
grated circuits, along with the ability to drive 10 LS-TTL
loads.
Each flip flop has independent J, K, PRESET, CLEAR, and
CLOCK inputs and Q and Q outputs. These devices are
edge sensitive to the clock input and change state on the
positive going transition of the clock pulse. Clear and preset
are independent of the clock and accomplished by a low
logic level on the corresponding input.
The 54HCT/74HCT logic family is functionally as well as
pin-out compatible with the standard 54LS/74LS logic fami-
ly. All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground.
MM54HCT/MM74HCT devices are intended to interface be-
tween TTL and NMOS components and standard CMOS
devices. These parts are also plug-in replacements for LS-
TTL devices and can be used to reduce power consumption
in existing designs.
Features
Y
Typical propagation delay: 20 ns
Y
Low input current: 1
m
A maximum
Y
Low quiescent current: 40
m
A maximum (74HCT Series)
Y
Output drive capability: 10 LS-TTL loads
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/5361–1
Function Table
Inputs
Outputs
PR
CLR
CLK
J
K
Q
Q
L
H
L
H
H
H
H
H
H
L
L
H
H
H
H
H
X
X
X
u
u
u
u
L
X
X
X
L
H
L
H
X
X
X
X
L
L
H
H
X
H
L
H
*
L
TOGGLE
Q0
H
Q0
L
H
H
*
H
Q0
L
Q0
Order Number MM54HCT109 or MM74HCT109
TL/F/5361–2
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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| MM74HCT109J | Dual J-K Flip-Flops with Preset and Clear |
| MM74HCT109N | Dual J-K Flip-Flops with Preset and Clear |
| MM74HCT112 | Dual J-K Flip-Flops with Preset and Clear |
| MM54HCT112 | Dual J-K Flip-Flops with Preset and Clear |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM54HCT112 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual J-K Flip-Flops with Preset and Clear |
| MM54HCT138E/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-To-8-Line Demultiplexer |
| MM54HCT138J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-To-8-Line Demultiplexer |
| MM54HCT138J/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-To-8-Line Demultiplexer |
| MM54HCT138J/883C | 制造商:Texas Instruments 功能描述: |
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