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參數資料
| 型號： | MM54HC20J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 4-Input NAND Gate |
| 中文描述： | HC/UH SERIES, DUAL 4-INPUT NAND GATE, CDIP14 |
| 封裝： | DIP-14 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 123K |
| 代理商： | MM54HC20J |
TL/F/5299
M
January 1988
MM54HC20/MM74HC20
Dual 4-Input NAND Gate
General Description
These NAND gates utilize advanced silicon-gate CMOS
technology to achieve operating speeds similar to LS-TTL
gates with the low power consumption of standard CMOS
integrated circuits. All gates have buffered outputs. All de-
vices have high noise immunity and the ability to drive 10
LS-TTL loads. The 54HC/74HC logic family is functionally
as well as pin-out compatible with the standard 54LS/74LS
logic family. All inputs are protected from damage due to
static discharge by internal diode clamps to V
CC
and
ground.
Features
Y
Typical propagation delay: 8 ns
Y
Wide power supply range: 2–6V
Y
Low quiescent current: 20
m
A maximum (74HC Series)
Y
Low input current: 1
m
A maximum
Y
Fanout of 10 LS-TTL loads
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/5299–1
Top View
Order Number MM54HC20 or MM74HC20
TL/F/5299–2
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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