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參數資料
| 型號： | AD9925 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| 中文描述： | CCD信號處理器垂直驅動器和精密時序發生器 |
| 文件頁數： | 92/96頁 |
| 文件大小： | 1447K |
| 代理商： | AD9925 |
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AD9925
Table 89. XV7 and XV8 Vertical Sequence 5 Registers
Address Data Bit Content Default Value Register Name
64
[0]
[11:1]
[23:12]
X
65
[11:0]
[23:12]
X
66
[0]
[23:1]
X
67
[23:0]
X
Rev. A | Page 92 of 96
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_5
UNUSED
XV78START_5
XV78REPO_5
XV78REPE_5
XV78HOLDEN_5
UNUSED
UNUSED
X
X
Table 90. XV7 and XV8 Vertical Sequence 6 Registers
Address Data Bit Content Default Value Register Name
68
[0]
[11:1]
[23:12]
X
69
[11:0]
[23:12]
X
6A
[0]
[23:1]
X
6B
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_6
UNUSED
XV78START_6
XV78REPO_6
XV78REPE_6
XV78HOLDEN_6
UNUSED
UNUSED
X
X
Table 91. XV7 and XV8 Vertical Sequence 7 Registers
Address Data Bit Content Default Value Register Name
6C
[0]
[11:1]
[23:12]
X
6D
[11:0]
[23:12]
X
6E
[0]
[23:1]
X
6F
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_7
UNUSED
XV78START_7
XV78REPO_7
XV78REPE_7
XV78HOLDEN_7
UNUSED
UNUSED
X
X
Table 92. XV7 and XV8 Vertical Sequence 8 Registers
Address Data Bit Content Default Value Register Name
70
[0]
[11:1]
[23:12]
X
71
[11:0]
[23:12]
X
72
[0]
[23:1]
X
73
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_8
UNUSED
XV78START_8
XV78REPO_8
XV78REPE_8
XV78HOLDEN_8
UNUSED
UNUSED
X
X
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9925BBCZ | 制造商:Analog Devices 功能描述:IC 12-BIT SIGNAL PROCESSOR |
| AD9925BBCZRL | 制造商:Analog Devices 功能描述:IC 12-BIT SIGNAL PROCESSOR |
| AD9925KBCZ | 制造商:Analog Devices 功能描述:12 BIT, 36 MSPS CCD SIGNAL PROCESSOR W/VERTICAL DRIVER - Bulk |
| AD9926BBCZ | 制造商:Analog Devices 功能描述: |
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