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參數資料
| 型號： | AD8527ARMZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 2/12頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP GP R-R 7MHZ DUAL 8MSOP |
| 標準包裝： | 1 |
| 放大器類型： | 通用 |
| 電路數： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 8 V/µs |
| 增益帶寬積： | 7MHz |
| 電流 - 輸入偏壓： | 450nA |
| 電壓 - 輸入偏移： | 1300µV |
| 電流 - 電源： | 900µA |
| 電流 - 輸出 / 通道： | 10mA |
| 電壓 - 電源，單路/雙路(±)： | 1.8 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 標準包裝 |
| 其它名稱： | AD8527ARMZ-REELDKR |
AD8517/AD8527
–10–
REV. B
DRIVING CAPACITIVE LOAD
Gain vs. Capacitive Load
Most amplifiers have difficulty driving capacitance due to degradation
of phase caused by additional phase lag from the capacitive load.
Higher capacitance at the output can increase the amount of over-
shoot and ringing in the amplifier’s step response and could even
affect the stability of the device. The value of capacitance load an
amplifier can drive before oscillation varies with gain, supply volt-
age, input signal, temperature, and frequency, among others. Unity
gain is the most challenging configuration for driving capacitance
load. However, the AD8517 offers good capacitance driving ability.
Table II shows the AD8517’s ability to capacitance load at differ-
ent gains before instability occurs. This table is good for all VSY.
Table II. Gain and Capacitance Load
Gain
Max Capacitance
1
400 pF
2
1.5 nF
2.5
8 nF
3
Unconditionally Stable
In-the-Loop Compensation Technique for Driving
Capacitive Loads
When driving capacitive loads in unity configuration, the in-the-
loop compensation technique is recommended to avoid oscillation
as is illustrated in Figure 22.
VIN
RX
CL
CF
RF
RG
VOUT
AD8517
RF + RG
CF =1 +
ACL
1
RF
CLRO
RX =
RO RG
RF
WHERE RO = OPEN-LOOP OUTPUT RESISTANCE
Figure 22. In-the-Loop Compensation Technique for
Driving Capacitive Loads
Snubber Network Compensation for Driving Capacitive Loads
As load capacitance increases, the overshoot and settling time
will increase and the unity gain bandwidth of the device will
decrease. Figure 23 shows an example of the AD8517 config-
ured for unity gain and driving a 10 k
resistor and a 680 pF
capacitor placed in parallel, with a square wave input set to a
frequency of 250 kHz and unity gain.
VOLTAGE
–
200mV/Div
TIME – 1 s/Div
F = 250kHz
AV = +1
C = 680pF
Figure 23. Photo of a Ringing Square Wave
By connecting a series R–C from the output of the device to
ground, known as the “snubber” network, this ringing and over-
shoot can be significantly reduced. Figure 24 shows the network
setup, and Figure 25 shows the improvement of the output
response with the “snubber” network added.
5V
CX
VIN
RX
CL
VOUT
AD8517
Figure 24. Snubber Network Compensation for Capacitive
Loads
TIME – 1 s/Div
F = 250kHz
AV = +1
C = 680pF
VOLTAGE
–
200mV/Div
Figure 25. Photo of a Square Wave with the Snubber
Network Compensation
The network operates in parallel with the load capacitor, CL,
and provides compensation for the added phase lag. The actual
values of the network resistor and capacitor have to be empiri-
cally determined. Table III shows some values of snubber network
for large capacitance load.
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