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參數資料
| 型號： | AD7853 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V to 5 V Single Supply, 200 KSPS 12-Bit Sampling ADCs(單電源,200kSPS 12位采樣A/D轉換器) |
| 中文描述： | 3 V至5 V單電源，200 ksps的12位采樣ADC（單電源，速度高達200ksps的12位采樣的A / D轉換器） |
| 文件頁數： | 31/34頁 |
| 文件大?。?/td> | 350K |
| 代理商： | AD7853 |
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REV. B
–31–
AD7853/AD7853L
68HC11/L11/16
SCK
SS
CONVST
CLKIN
SCLK
DOUT
BUSY
SM1
SM2
POLARITY
OPTIONAL
4MHz/1.8MHz
SYNC
MISO
DIN AT DGND FOR
NO WRITING TO PART
DGND FOR HC11, SPI
DV
DD
FOR HC16, QSPI
MASTER
SLAVE
DIN
DV
DD
OPTIONAL
IRQ
MOSI
DV
DD
SPI
HC16, QSPI
AD7853/AD7853L
Figure 46. 68HC11 and 68HC16 Interface
AD7853/AD7853L to ADSP-21xx Interface
Figure 47 shows the AD7853/AD7853L interface to the ADSP-
21xx. The ADSP-21xx is the slave and the AD7853/AD7853L
is the master. The AD7853/AD7853L is in Interface Mode 5.
For the ADSP-21xx, the bits in the serial port control register
should be set up as TFSR = RFSR = 1 (need a frame sync for
every transfer), SLEN = 15 (16-bit word length), TFSW =
RFSW = 1 (alternate framing mode for transmit and receive
operations), INVRFS = INVTFS = 1 (active low RFS and
TFS), IRFS = ITFS = 0 (External RFS and TFS), and ISCLK
= 0 (external serial clock). The CLKIN and
CONVST
signals
could be supplied from the ADSP-21xx or from an external
source. The AD7853/AD7853L supplies the SCLK and the
SYNC
signals to the ADSP-21xx and the reading and writing
takes place during conversion. The BUSY signal only indicates
when the conversion is finished and may not be required. The
data access and hold times of the ADSP-21xx and the AD7853/
AD7853L allows for a CLKIN of 4 MHz/1.8 MHz at both 5 V
and 3 V supplies.
ADSP-21xx
DR
SCK
AD7853/AD7853L
CONVST
CLKIN
SCLK
DOUT
BUSY
SM1
SM2
POLARITY
OPTIONAL
4MHz/1.8MHz
SYNC
RFS
DIN AT DGND FOR
NO WRITING TO PART
SLAVE
MASTER
OPTIONAL
DIN
DV
DD
OPTIONAL
IRQ
DT
TFS
Figure 47. ADSP-21xx Interface
AD7853/AD7853L to DSP56000/1/2/L002 Interface
Figure 48 shows the AD7853/AD7853L to DSP56000/1/2/L002
interface. Here the DSP5600x is the master and the AD7853/
AD7853L is the slave. The AD7853/AD7853L is in Interface
Mode 3. The DSP56L002 is used when the AD7853/AD7853L
is being operated at 3 V. The setting of the bits in the registers
of the DSP5600x would be for synchronous operation (SYN =
1), internal frame sync (SCD2 = 1), Internal clock (SCKD =
1), 16-bit word length (WL1 = 1, WL0 = 0), frames sync only
active at beginning of the transfer (FSL1 = 0, FSL0 = 1). A
gated clock can be used (GCK = 1) or if the SCLK is to be tied
to the CLKIN of the AD7853/AD7853L, then there must be a
continuous clock (GCK = 0). Again the data access and hold
times of the DSP5600x and the AD7853/AD7853L should
allow for an SCLK of 4 MHz/1.8 MHz.
DSP
56000/1/2/L002
SRD
SCK
AD7853/AD7853L
CONVST
CLKIN
SCLK
DOUT
BUSY
SM1
SM2
POLARITY
OPTIONAL
4MHz/1.8MHz
SYNC
SC2
DIN AT DGND FOR
NO WRITING TO PART
MASTER
SLAVE
OPTIONAL
DIN
DV
DD
OPTIONAL
IRQ
STD
Figure 48. DSP56000/1/2 Interface
AD7853/AD7853L to TMS320C20/25/5x/LC5x Interface
Figure 49 shows the AD7853/AD7853L to the TMS320Cxx
interface. The TMS320LC5x is used when the AD7853/AD7853L
is being operated at 3 V. The AD7853/AD7853L is the master
and operates in Interface Mode 5. For the TMS320Cxx the
CLKX, CLKR, FSX, and FSR pins should all be configured as
inputs. The CLKX and the CLKR should be connected to-
gether as should the FSX and FSR. Since the AD7853/AD7853L
is the master and the reading and writing occurs during the
conversion, the BUSY only indicates when the conversion is
finished and thus may not be required. Again the data access
and hold times of the TMS320Cxx and the AD7853/AD7853L
allows for a CLKIN of 4 MHz/1.8 MHz.
TMS320C20/
25/5x/LC5x
DR
CLKR
AD7853/AD7853L
CONVST
CLKIN
SCLK
DOUT
BUSY
SM1
SM2
POLARITY
OPTIONAL
4MHz/1.8MHz
SYNC
FSR
DIN AT DGND FOR
NO WRITING TO PART
SLAVE
MASTER
OPTIONAL
DIN
DV
DD
OPTIONAL
INT0
DT
FSX
Figure 49. TMS320C20/25/5x Interface
相關PDF資料 |
PDF描述 |
|---|---|
| AD7853AN | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853AR | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853ARS | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853BN | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853BR | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7853AN | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin PDIP 制造商:Analog Devices 功能描述:ADC SGL SAR 200KSPS 12-BIT SERL 24PDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk 制造商:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853ANZ | 功能描述:IC ADC 12BIT SRL 200KSPS 24-DIP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數:12 采樣率（每秒）:3M 數據接口:- 轉換器數目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數目和類型:- |
| AD7853AR | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk |
| AD7853AR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin SOIC W T/R |
| AD7853ARS | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk |
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