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| 型號： | AD7840 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | LC2MOS Complete 14-Bit DAC |
| 中文描述： | LC2MOS完整的14位DAC |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 337K |
| 代理商： | AD7840 |
REV. B
–2–
AD7840–SPECIFICATIONS
(V
DD
= +5 V
6
5%, V
SS
= –5 V
6
5%, AGND= DGND= OV, REF IN= +3 V, R
L
= 2 k
V
,
C
L
= 100 pF. All specifications T
MN
to T
MAX
unless othewse noted.)
Parameter
J, A
1
K, B
1
S
1
Units
T est Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal to Noise Ratio
3
(SNR)
76
78
76
dB min
V
OUT
= 1 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically 82 dB at +25
°
C for 0 < V
OUT
< 20 kHz
4
V
OUT
= 1 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically –84 dB at +25
°
C for 0 < V
OUT
< 20 kHz
4
V
OUT
= 1 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically –84 dB at +25
°
C for 0 < V
OUT
< 20 kHz
4
T otal Harmonic Distortion (T HD) –78
–80
–78
dB max
Peak Harmonic or Spurious Noise
–78
–80
–78
dB max
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Bipolar Zero Error
Positive Full Scale Error
5
Negative Full Scale Error
5
14
±
2
±
0.9
±
10
±
10
±
10
14
±
1
±
0.9
±
10
±
10
±
10
14
±
2
±
0.9
±
10
±
10
±
10
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
Guaranteed Monotonic
REFERENCE OUT PUT
6
REF OUT @ +25
°
C
2.99
3.01
±
60
2.99
3.01
±
60
2.99
3.01
±
60
V min
V max
ppm/
°
C max
REF OUT T C
Reference Load Change
(
REF OUT vs.
I)
–1
–1
–1
mV max
Reference Load Current Change (0–500
μ
A)
REFERENCE INPUT
Reference Input Range
2.85
3.15
50
2.85
3.15
50
2.85
3.15
50
V min
V max
μ
A max
3 V
±
5%
Input Current
LOGIC INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Current (
CS
Input Only)
Input Capacitance, C
IN7
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
V min
V max
μ
A max
μ
A max
pF max
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
V
IN
=V
SS
to V
DD
ANALOG OUT PUT
Output Voltage Range
DC Output Impedance
Short-Circuit Current
±
3
0.1
20
±
3
0.1
20
±
3
0.1
20
V nom
typ
mA typ
AC CHARACT ERIST ICS
7
Voltage Output Settling T ime
Positive Full-Scale Change
Negative Full-Scale Change
Digital-to-Analog Glitch Impulse
Digital Feedthrough
Settling T ime to within
±
1/2 LSB of Final Value
T ypically 2
μ
s
T ypically 2.5
μ
s
4
4
10
2
4
4
10
2
4
4
10
2
μ
s max
μ
s max
nV secs typ
nV secs typ
POWER REQUIREMENT S
V
DD
V
SS
I
DD
I
SS
Power Dissipation
+5
–5
14
6
100
+5
–5
14
6
100
+5
–5
15
7
110
V nom
V nom
mA max
mA max
mW max
±
5% for Specified Performance
±
5% for Specified Performance
Output Unloaded, SCLK = +5 V. T ypically 10 mA
Output Unloaded, SCLK = +5 V. T ypically 4 mA
T ypically 70 mW
NOT ES
1
T emperature ranges are as follows: J, K Versions, 0
°
C to +70
°
C; A, B Versions, –25
°
C to +85
°
C; S Version, –55
°
C to +125
°
C.
2
V
(pk-pk) =
±
3 V
3
SNR calculation includes distortion and noise components.
4
Using external sample-and-hold (see T esting the AD7840).
5
Measured with respect to REF IN and includes bipolar offset error.
6
For capacitive loads greater than 50 pF, a series resistor is required (see Internal Reference section).
7
Sample tested @ +25
°
C to ensure compliance.
Specifications subject to change without notice.
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